Module: Mesa Branch: main Commit: 5e9ea154849ebe19b96a243b9716bd264545bf8b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e9ea154849ebe19b96a243b9716bd264545bf8b
Author: Georg Lehmann <[email protected]> Date: Fri Mar 24 13:45:16 2023 +0100 aco: fix p_interp_gfx11 comment It no longer uses a tmp exec and scc. Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22107> --- src/amd/compiler/aco_opcodes.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/compiler/aco_opcodes.py b/src/amd/compiler/aco_opcodes.py index 99841194925..3f1fcd2d781 100644 --- a/src/amd/compiler/aco_opcodes.py +++ b/src/amd/compiler/aco_opcodes.py @@ -348,8 +348,8 @@ opcode("p_init_scratch") opcode("p_jump_to_epilog") # loads and interpolates a fragment shader input with a correct exec mask -#dst0=result, dst1=exec_tmp, dst2=clobber_scc, src0=linear_vgpr, src1=attribute, src2=component, src3=coord1, src4=coord2, src5=m0 -#dst0=result, dst1=exec_tmp, dst2=clobber_scc, src0=linear_vgpr, src1=attribute, src2=component, src3=dpp_ctrl, src4=m0 +#dst0=result, src0=linear_vgpr, src1=attribute, src2=component, src3=coord1, src4=coord2, src5=m0 +#dst0=result, src0=linear_vgpr, src1=attribute, src2=component, src3=dpp_ctrl, src4=m0 opcode("p_interp_gfx11") # performs dual source MRTs swizzling and emits exports on GFX11
