Module: Mesa Branch: staging/23.0 Commit: 6caeb11fe9afbad7175f2e3ddc35c97667aad71a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6caeb11fe9afbad7175f2e3ddc35c97667aad71a
Author: Daniel Schürmann <[email protected]> Date: Mon Mar 13 16:59:16 2023 +0100 radv/rt: Fix any_hit scratch variables. We have to make sure not to change call_data locations as well. Fixes: 481f78ab93e2f2169c53a7c8494b488d45b60def ('radv/rt: place any-hit scratch vars after intersection scratch vars') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21876> (cherry picked from commit f6a36190a1c2b723f107c29df3b87e4edd400696) --- .pick_status.json | 2 +- src/amd/vulkan/radv_rt_shader.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 63f81c3b2dc..b6019de5555 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -6223,7 +6223,7 @@ "description": "radv/rt: Fix any_hit scratch variables.", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "481f78ab93e2f2169c53a7c8494b488d45b60def" }, diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c index b0f8c81608d..8f379c4644b 100644 --- a/src/amd/vulkan/radv_rt_shader.c +++ b/src/amd/vulkan/radv_rt_shader.c @@ -914,15 +914,25 @@ lower_any_hit_for_intersection(nir_shader *any_hit) nir_instr_remove(&intrin->instr); break; + /* We place all any_hit scratch variables after intersection scratch variables. + * For that reason, we increment the scratch offset by the intersection scratch + * size. For call_data, we have to subtract the offset again. + */ case nir_intrinsic_load_scratch: + b->cursor = nir_before_instr(instr); nir_instr_rewrite_src_ssa(instr, &intrin->src[0], nir_iadd_nuw(b, scratch_offset, intrin->src[0].ssa)); break; - case nir_intrinsic_store_scratch: + b->cursor = nir_before_instr(instr); nir_instr_rewrite_src_ssa(instr, &intrin->src[1], nir_iadd_nuw(b, scratch_offset, intrin->src[1].ssa)); break; + case nir_intrinsic_load_rt_arg_scratch_offset_amd: + b->cursor = nir_after_instr(instr); + nir_ssa_def *arg_offset = nir_isub(b, &intrin->dest.ssa, scratch_offset); + nir_ssa_def_rewrite_uses_after(&intrin->dest.ssa, arg_offset, arg_offset->parent_instr); + break; default: break;
