Module: Mesa Branch: main Commit: c9d60547ef3908f3d504354800fb04192ddc7781 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9d60547ef3908f3d504354800fb04192ddc7781
Author: Qiang Yu <[email protected]> Date: Fri Feb 24 14:39:17 2023 +0800 nir,radeonsi: add and implement nir_load_alpha_reference_amd Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21552> --- src/compiler/nir/nir_divergence_analysis.c | 1 + src/compiler/nir/nir_intrinsics.py | 3 +++ src/gallium/drivers/radeonsi/si_nir_lower_abi.c | 3 +++ src/gallium/drivers/radeonsi/si_shader.c | 3 ++- src/gallium/drivers/radeonsi/si_shader_internal.h | 1 + 5 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 96fd2534571..ab6286ff5e0 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -207,6 +207,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd: case nir_intrinsic_load_btd_shader_type_intel: case nir_intrinsic_load_base_workgroup_id: + case nir_intrinsic_load_alpha_reference_amd: is_divergent = false; break; diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 74b301b3be4..4a172d0def3 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1598,6 +1598,9 @@ system_value("lds_ngg_gs_out_vertex_base_amd", 1) # FLAGS = AC_EXP_FLAG_* intrinsic("export_amd", [0], indices=[BASE, WRITE_MASK, FLAGS]) +# Alpha test reference value +system_value("alpha_reference_amd", 1) + # V3D-specific instrinc for tile buffer color reads. # # The hardware requires that we read the samples and components of a pixel diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index 27ed661e054..e72cfb5ec2a 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -478,6 +478,9 @@ static bool lower_abi_instr(nir_builder *b, nir_instr *instr, struct lower_abi_s case nir_intrinsic_load_ring_tess_factors_offset_amd: replacement = ac_nir_load_arg(b, &args->ac, args->ac.tcs_factor_offset); break; + case nir_intrinsic_load_alpha_reference_amd: + replacement = ac_nir_load_arg(b, &args->ac, args->alpha_reference); + break; default: return false; } diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index fac4047bcb3..8402ee4727a 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -662,7 +662,8 @@ void si_init_shader_args(struct si_shader *shader, struct si_shader_args *args) case MESA_SHADER_FRAGMENT: declare_global_desc_pointers(args); declare_per_stage_desc_pointers(args, shader, true); - si_add_arg_checked(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL, SI_PARAM_ALPHA_REF); + si_add_arg_checked(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->alpha_reference, + SI_PARAM_ALPHA_REF); si_add_arg_checked(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.prim_mask, SI_PARAM_PRIM_MASK); diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index be71169878c..7a7a1cb8d30 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -81,6 +81,7 @@ struct si_shader_args { struct ac_arg tes_offchip_addr; /* PS */ struct ac_arg pos_fixed_pt; + struct ac_arg alpha_reference; /* CS */ struct ac_arg block_size; struct ac_arg cs_user_data;
