Module: Mesa Branch: main Commit: 362a07db3a09d674b6f0cc7f45ab7c03d59caf88 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=362a07db3a09d674b6f0cc7f45ab7c03d59caf88
Author: Lionel Landwerlin <[email protected]> Date: Tue Mar 14 18:22:50 2023 +0200 intel/fs: don't consider fixup_nomask_control_flow SENDs predicate Those SENDs are still doing a full register write. We just inserted some predication for a workaround. Signed-off-by: Lionel Landwerlin <[email protected]> Cc: mesa-stable Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853> --- src/intel/compiler/brw_fs.cpp | 4 +++- src/intel/compiler/brw_ir.h | 6 ++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 77cd0b757b8..ceeac3db004 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -641,7 +641,8 @@ fs_visitor::limit_dispatch_width(unsigned n, const char *msg) bool fs_inst::is_partial_write() const { - if (this->predicate && this->opcode != BRW_OPCODE_SEL) + if (this->predicate && !this->predicate_trivial && + this->opcode != BRW_OPCODE_SEL) return true; if (this->dst.offset % REG_SIZE != 0) @@ -6453,6 +6454,7 @@ fs_visitor::fixup_nomask_control_flow() set_predicate(pred, inst); inst->flag_subreg = 0; + inst->predicate_trivial = true; if (save_flag) ubld.group(1, 0).at(block, inst->next).MOV(flag, tmp); diff --git a/src/intel/compiler/brw_ir.h b/src/intel/compiler/brw_ir.h index 33011f7299d..0074f74112b 100644 --- a/src/intel/compiler/brw_ir.h +++ b/src/intel/compiler/brw_ir.h @@ -178,6 +178,12 @@ struct backend_instruction { * the scratch surface offset to build * extended descriptor */ + bool predicate_trivial:1; /**< The predication mask applied to this + * instruction is guaranteed to be uniform and + * a superset of the execution mask of the + * present block, no currently enabled channels + * will be disabled by the predicate. + */ bool eot:1; /* Chooses which flag subregister (f0.0 to f1.1) is used for conditional
