Module: Mesa Branch: main Commit: e25aee8e34d5930566c77d97e0b6cc5c5f65dc75 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e25aee8e34d5930566c77d97e0b6cc5c5f65dc75
Author: Lionel Landwerlin <[email protected]> Date: Fri Mar 24 13:29:59 2023 +0200 intel/fs: also allow vec8+ vectorization of load_global_const_block_intel Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853> --- src/intel/compiler/brw_nir.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 777e3e252c8..749b046a3e6 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1301,7 +1301,8 @@ brw_nir_should_vectorize_mem(unsigned align_mul, unsigned align_offset, if (bit_size > 32) return false; - if (low->intrinsic == nir_intrinsic_load_ssbo_uniform_block_intel || + if (low->intrinsic == nir_intrinsic_load_global_const_block_intel || + low->intrinsic == nir_intrinsic_load_ssbo_uniform_block_intel || low->intrinsic == nir_intrinsic_load_shared_uniform_block_intel) { if (num_components > 4) { if (!util_is_power_of_two_nonzero(num_components))
