Module: Mesa Branch: main Commit: ba5bc2677fae8eb398802786c1d65b950c812478 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba5bc2677fae8eb398802786c1d65b950c812478
Author: Emma Anholt <[email protected]> Date: Wed Mar 22 14:10:20 2023 -0700 glsl: Drop PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED. All drivers should now be using the appropriate NIR lowering, so we can drop this pile of code. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083> --- docs/gallium/screen.rst | 2 - src/compiler/glsl/ir_optimization.h | 2 +- src/compiler/glsl/lower_instructions.cpp | 283 +---------------------- src/compiler/glsl/test_optpass.cpp | 2 +- src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 - src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 - src/gallium/drivers/asahi/agx_pipe.c | 1 - src/gallium/drivers/crocus/crocus_screen.c | 1 - src/gallium/drivers/d3d12/d3d12_screen.cpp | 1 - src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 - src/gallium/drivers/freedreno/freedreno_screen.c | 1 - src/gallium/drivers/i915/i915_screen.c | 1 - src/gallium/drivers/iris/iris_screen.c | 1 - src/gallium/drivers/nouveau/nv30/nv30_screen.c | 2 - src/gallium/drivers/nouveau/nv50/nv50_screen.c | 1 - src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 - src/gallium/drivers/panfrost/pan_screen.c | 1 - src/gallium/drivers/r300/r300_screen.c | 2 - src/gallium/drivers/r600/r600_pipe.c | 1 - src/gallium/drivers/radeonsi/si_get.c | 1 - src/gallium/drivers/svga/svga_screen.c | 3 - src/gallium/drivers/v3d/v3d_screen.c | 1 - src/gallium/drivers/vc4/vc4_screen.c | 1 - src/gallium/drivers/zink/zink_screen.c | 1 - src/gallium/include/pipe/p_defines.h | 1 - src/mesa/state_tracker/st_glsl_to_ir.cpp | 4 +- 26 files changed, 4 insertions(+), 314 deletions(-) diff --git a/docs/gallium/screen.rst b/docs/gallium/screen.rst index 8714b983f81..2a7a16b0466 100644 --- a/docs/gallium/screen.rst +++ b/docs/gallium/screen.rst @@ -750,8 +750,6 @@ support different features. sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS. * ``PIPE_SHADER_CAP_DROUND_SUPPORTED``: Whether double precision rounding is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used. -* ``PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and - DLDEXP are supported. * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't ignore tgsi_declaration_range::Last for shader inputs and outputs. * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h index abea3bd1d0f..8e56a84b807 100644 --- a/src/compiler/glsl/ir_optimization.h +++ b/src/compiler/glsl/ir_optimization.h @@ -60,7 +60,7 @@ bool do_vec_index_to_cond_assign(exec_list *instructions); bool lower_discard(exec_list *instructions); void lower_discard_flow(exec_list *instructions); bool lower_instructions(exec_list *instructions, - bool have_dfrexp, bool have_dround, + bool have_dround, bool have_gpu_shader5); bool lower_clip_cull_distance(struct gl_shader_program *prog, gl_linked_shader *shader); diff --git a/src/compiler/glsl/lower_instructions.cpp b/src/compiler/glsl/lower_instructions.cpp index 18a229dbc06..95339b80a86 100644 --- a/src/compiler/glsl/lower_instructions.cpp +++ b/src/compiler/glsl/lower_instructions.cpp @@ -32,11 +32,6 @@ * Currently supported transformations: * - DOPS_TO_DFRAC * - * DFREXP_DLDEXP_TO_ARITH: - * --------------- - * Converts ir_binop_ldexp, ir_unop_frexp_sig, and ir_unop_frexp_exp to - * arithmetic and bit ops for double arguments. - * * DOPS_TO_DFRAC: * -------------- * Converts double trunc, ceil, floor, round to fract @@ -53,7 +48,6 @@ /* Operations for lower_instructions() */ #define DOPS_TO_DFRAC 0x800 -#define DFREXP_DLDEXP_TO_ARITH 0x1000 #define FIND_LSB_TO_FLOAT_CAST 0x20000 #define FIND_MSB_TO_FLOAT_CAST 0x40000 #define IMUL_HIGH_TO_MUL 0x80000 @@ -74,9 +68,6 @@ public: private: unsigned lower; /** Bitfield of which operations to lower */ - void dldexp_to_arith(ir_expression *); - void dfrexp_sig_to_arith(ir_expression *); - void dfrexp_exp_to_arith(ir_expression *); void double_dot_to_fma(ir_expression *); void double_lrp(ir_expression *); void dceil_to_dfrac(ir_expression *); @@ -104,11 +95,10 @@ private: #define lowering(x) (this->lower & x) bool -lower_instructions(exec_list *instructions, bool have_dfrexp, +lower_instructions(exec_list *instructions, bool have_dround, bool have_gpu_shader5) { unsigned what_to_lower = - (have_dfrexp ? 0 : DFREXP_DLDEXP_TO_ARITH) | (have_dround ? 0 : DOPS_TO_DFRAC) | /* Assume that if ARB_gpu_shader5 is not supported then all of the * extended integer functions need lowering. It may be necessary to add @@ -124,262 +114,6 @@ lower_instructions(exec_list *instructions, bool have_dfrexp, return v.progress; } -void -lower_instructions_visitor::dldexp_to_arith(ir_expression *ir) -{ - /* See ldexp_to_arith for structure. Uses frexp_exp to extract the exponent - * from the significand. - */ - - const unsigned vec_elem = ir->type->vector_elements; - - /* Types */ - const glsl_type *ivec = glsl_type::get_instance(GLSL_TYPE_INT, vec_elem, 1); - const glsl_type *bvec = glsl_type::get_instance(GLSL_TYPE_BOOL, vec_elem, 1); - - /* Constants */ - ir_constant *zeroi = ir_constant::zero(ir, ivec); - - ir_constant *sign_mask = new(ir) ir_constant(0x80000000u); - - ir_constant *exp_shift = new(ir) ir_constant(20u); - ir_constant *exp_width = new(ir) ir_constant(11u); - ir_constant *exp_bias = new(ir) ir_constant(1022, vec_elem); - - /* Temporary variables */ - ir_variable *x = new(ir) ir_variable(ir->type, "x", ir_var_temporary); - ir_variable *exp = new(ir) ir_variable(ivec, "exp", ir_var_temporary); - - ir_variable *zero_sign_x = new(ir) ir_variable(ir->type, "zero_sign_x", - ir_var_temporary); - - ir_variable *extracted_biased_exp = - new(ir) ir_variable(ivec, "extracted_biased_exp", ir_var_temporary); - ir_variable *resulting_biased_exp = - new(ir) ir_variable(ivec, "resulting_biased_exp", ir_var_temporary); - - ir_variable *is_not_zero_or_underflow = - new(ir) ir_variable(bvec, "is_not_zero_or_underflow", ir_var_temporary); - - ir_instruction &i = *base_ir; - - /* Copy <x> and <exp> arguments. */ - i.insert_before(x); - i.insert_before(assign(x, ir->operands[0])); - i.insert_before(exp); - i.insert_before(assign(exp, ir->operands[1])); - - ir_expression *frexp_exp = expr(ir_unop_frexp_exp, x); - if (lowering(DFREXP_DLDEXP_TO_ARITH)) - dfrexp_exp_to_arith(frexp_exp); - - /* Extract the biased exponent from <x>. */ - i.insert_before(extracted_biased_exp); - i.insert_before(assign(extracted_biased_exp, add(frexp_exp, exp_bias))); - - i.insert_before(resulting_biased_exp); - i.insert_before(assign(resulting_biased_exp, - add(extracted_biased_exp, exp))); - - /* Test if result is ±0.0, subnormal, or underflow by checking if the - * resulting biased exponent would be less than 0x1. If so, the result is - * 0.0 with the sign of x. (Actually, invert the conditions so that - * immediate values are the second arguments, which is better for i965) - * TODO: Implement in a vector fashion. - */ - i.insert_before(zero_sign_x); - for (unsigned elem = 0; elem < vec_elem; elem++) { - ir_variable *unpacked = - new(ir) ir_variable(glsl_type::uvec2_type, "unpacked", ir_var_temporary); - i.insert_before(unpacked); - i.insert_before( - assign(unpacked, - expr(ir_unop_unpack_double_2x32, swizzle(x, elem, 1)))); - i.insert_before(assign(unpacked, bit_and(swizzle_y(unpacked), sign_mask->clone(ir, NULL)), - WRITEMASK_Y)); - i.insert_before(assign(unpacked, ir_constant::zero(ir, glsl_type::uint_type), WRITEMASK_X)); - i.insert_before(assign(zero_sign_x, - expr(ir_unop_pack_double_2x32, unpacked), - 1 << elem)); - } - i.insert_before(is_not_zero_or_underflow); - i.insert_before(assign(is_not_zero_or_underflow, - gequal(resulting_biased_exp, - new(ir) ir_constant(0x1, vec_elem)))); - i.insert_before(assign(x, csel(is_not_zero_or_underflow, - x, zero_sign_x))); - i.insert_before(assign(resulting_biased_exp, - csel(is_not_zero_or_underflow, - resulting_biased_exp, zeroi))); - - /* We could test for overflows by checking if the resulting biased exponent - * would be greater than 0xFE. Turns out we don't need to because the GLSL - * spec says: - * - * "If this product is too large to be represented in the - * floating-point type, the result is undefined." - */ - - ir_rvalue *results[4] = {NULL}; - for (unsigned elem = 0; elem < vec_elem; elem++) { - ir_variable *unpacked = - new(ir) ir_variable(glsl_type::uvec2_type, "unpacked", ir_var_temporary); - i.insert_before(unpacked); - i.insert_before( - assign(unpacked, - expr(ir_unop_unpack_double_2x32, swizzle(x, elem, 1)))); - - ir_expression *bfi = bitfield_insert( - swizzle_y(unpacked), - i2u(swizzle(resulting_biased_exp, elem, 1)), - exp_shift->clone(ir, NULL), - exp_width->clone(ir, NULL)); - - i.insert_before(assign(unpacked, bfi, WRITEMASK_Y)); - - results[elem] = expr(ir_unop_pack_double_2x32, unpacked); - } - - ir->operation = ir_quadop_vector; - ir->init_num_operands(); - ir->operands[0] = results[0]; - ir->operands[1] = results[1]; - ir->operands[2] = results[2]; - ir->operands[3] = results[3]; - - /* Don't generate new IR that would need to be lowered in an additional - * pass. - */ - - this->progress = true; -} - -void -lower_instructions_visitor::dfrexp_sig_to_arith(ir_expression *ir) -{ - const unsigned vec_elem = ir->type->vector_elements; - const glsl_type *bvec = glsl_type::get_instance(GLSL_TYPE_BOOL, vec_elem, 1); - - /* Double-precision floating-point values are stored as - * 1 sign bit; - * 11 exponent bits; - * 52 mantissa bits. - * - * We're just extracting the significand here, so we only need to modify - * the upper 32-bit uint. Unfortunately we must extract each double - * independently as there is no vector version of unpackDouble. - */ - - ir_instruction &i = *base_ir; - - ir_variable *is_not_zero = - new(ir) ir_variable(bvec, "is_not_zero", ir_var_temporary); - ir_rvalue *results[4] = {NULL}; - - ir_constant *dzero = new(ir) ir_constant(0.0, vec_elem); - i.insert_before(is_not_zero); - i.insert_before( - assign(is_not_zero, - nequal(abs(ir->operands[0]->clone(ir, NULL)), dzero))); - - /* TODO: Remake this as more vector-friendly when int64 support is - * available. - */ - for (unsigned elem = 0; elem < vec_elem; elem++) { - ir_constant *zero = new(ir) ir_constant(0u, 1); - ir_constant *sign_mantissa_mask = new(ir) ir_constant(0x800fffffu, 1); - - /* Exponent of double floating-point values in the range [0.5, 1.0). */ - ir_constant *exponent_value = new(ir) ir_constant(0x3fe00000u, 1); - - ir_variable *bits = - new(ir) ir_variable(glsl_type::uint_type, "bits", ir_var_temporary); - ir_variable *unpacked = - new(ir) ir_variable(glsl_type::uvec2_type, "unpacked", ir_var_temporary); - - ir_rvalue *x = swizzle(ir->operands[0]->clone(ir, NULL), elem, 1); - - i.insert_before(bits); - i.insert_before(unpacked); - i.insert_before(assign(unpacked, expr(ir_unop_unpack_double_2x32, x))); - - /* Manipulate the high uint to remove the exponent and replace it with - * either the default exponent or zero. - */ - i.insert_before(assign(bits, swizzle_y(unpacked))); - i.insert_before(assign(bits, bit_and(bits, sign_mantissa_mask))); - i.insert_before(assign(bits, bit_or(bits, - csel(swizzle(is_not_zero, elem, 1), - exponent_value, - zero)))); - i.insert_before(assign(unpacked, bits, WRITEMASK_Y)); - results[elem] = expr(ir_unop_pack_double_2x32, unpacked); - } - - /* Put the dvec back together */ - ir->operation = ir_quadop_vector; - ir->init_num_operands(); - ir->operands[0] = results[0]; - ir->operands[1] = results[1]; - ir->operands[2] = results[2]; - ir->operands[3] = results[3]; - - this->progress = true; -} - -void -lower_instructions_visitor::dfrexp_exp_to_arith(ir_expression *ir) -{ - const unsigned vec_elem = ir->type->vector_elements; - const glsl_type *bvec = glsl_type::get_instance(GLSL_TYPE_BOOL, vec_elem, 1); - const glsl_type *uvec = glsl_type::get_instance(GLSL_TYPE_UINT, vec_elem, 1); - - /* Double-precision floating-point values are stored as - * 1 sign bit; - * 11 exponent bits; - * 52 mantissa bits. - * - * We're just extracting the exponent here, so we only care about the upper - * 32-bit uint. - */ - - ir_instruction &i = *base_ir; - - ir_variable *is_not_zero = - new(ir) ir_variable(bvec, "is_not_zero", ir_var_temporary); - ir_variable *high_words = - new(ir) ir_variable(uvec, "high_words", ir_var_temporary); - ir_constant *dzero = new(ir) ir_constant(0.0, vec_elem); - ir_constant *izero = new(ir) ir_constant(0, vec_elem); - - ir_rvalue *absval = abs(ir->operands[0]); - - i.insert_before(is_not_zero); - i.insert_before(high_words); - i.insert_before(assign(is_not_zero, nequal(absval->clone(ir, NULL), dzero))); - - /* Extract all of the upper uints. */ - for (unsigned elem = 0; elem < vec_elem; elem++) { - ir_rvalue *x = swizzle(absval->clone(ir, NULL), elem, 1); - - i.insert_before(assign(high_words, - swizzle_y(expr(ir_unop_unpack_double_2x32, x)), - 1 << elem)); - - } - ir_constant *exponent_shift = new(ir) ir_constant(20, vec_elem); - ir_constant *exponent_bias = new(ir) ir_constant(-1022, vec_elem); - - /* For non-zero inputs, shift the exponent down and apply bias. */ - ir->operation = ir_triop_csel; - ir->init_num_operands(); - ir->operands[0] = new(ir) ir_dereference_variable(is_not_zero); - ir->operands[1] = add(exponent_bias, u2i(rshift(high_words, exponent_shift))); - ir->operands[2] = izero; - - this->progress = true; -} - void lower_instructions_visitor::double_dot_to_fma(ir_expression *ir) { @@ -927,21 +661,6 @@ lower_instructions_visitor::visit_leave(ir_expression *ir) double_lrp(ir); break; - case ir_binop_ldexp: - if (lowering(DFREXP_DLDEXP_TO_ARITH) && ir->type->is_double()) - dldexp_to_arith(ir); - break; - - case ir_unop_frexp_exp: - if (lowering(DFREXP_DLDEXP_TO_ARITH) && ir->operands[0]->type->is_double()) - dfrexp_exp_to_arith(ir); - break; - - case ir_unop_frexp_sig: - if (lowering(DFREXP_DLDEXP_TO_ARITH) && ir->operands[0]->type->is_double()) - dfrexp_sig_to_arith(ir); - break; - case ir_unop_trunc: if (lowering(DOPS_TO_DFRAC) && ir->type->is_double()) dtrunc_to_dfrac(ir); diff --git a/src/compiler/glsl/test_optpass.cpp b/src/compiler/glsl/test_optpass.cpp index ea2e2604fd8..7555424fde1 100644 --- a/src/compiler/glsl/test_optpass.cpp +++ b/src/compiler/glsl/test_optpass.cpp @@ -93,7 +93,7 @@ do_optimization(struct exec_list *ir, const char *optimization, return lower_discard(ir); } else if (sscanf(optimization, "lower_instructions ( %d ) ", &int_0) == 1) { - return lower_instructions(ir, false, false, false); + return lower_instructions(ir, false, false); } else { printf("Unrecognized optimization %s\n", optimization); exit(EXIT_FAILURE); diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h index 4acd9e93e5b..30e5c74fc15 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h @@ -150,7 +150,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param) case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 1; case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: return 0; diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h index 72ffe476257..6e13618fbe1 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h @@ -482,7 +482,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param) return 1 << PIPE_SHADER_IR_TGSI; case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: return 1; - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 1; case PIPE_SHADER_CAP_DROUND_SUPPORTED: diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c index ea4296f1e1a..d5036254f72 100644 --- a/src/gallium/drivers/asahi/agx_pipe.c +++ b/src/gallium/drivers/asahi/agx_pipe.c @@ -1590,7 +1590,6 @@ agx_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader, case PIPE_SHADER_CAP_INT64_ATOMICS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 0; diff --git a/src/gallium/drivers/crocus/crocus_screen.c b/src/gallium/drivers/crocus/crocus_screen.c index 0e59773f9e6..de9d78d36bd 100644 --- a/src/gallium/drivers/crocus/crocus_screen.c +++ b/src/gallium/drivers/crocus/crocus_screen.c @@ -523,7 +523,6 @@ crocus_get_shader_param(struct pipe_screen *pscreen, return 1 << PIPE_SHADER_IR_NIR; case PIPE_SHADER_CAP_DROUND_SUPPORTED: return 1; - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_FP16_DERIVATIVES: diff --git a/src/gallium/drivers/d3d12/d3d12_screen.cpp b/src/gallium/drivers/d3d12/d3d12_screen.cpp index b7623d30daa..caadc805091 100644 --- a/src/gallium/drivers/d3d12/d3d12_screen.cpp +++ b/src/gallium/drivers/d3d12/d3d12_screen.cpp @@ -473,7 +473,6 @@ d3d12_get_shader_param(struct pipe_screen *pscreen, return PIPE_MAX_SAMPLERS; case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: return 0; /* not implemented */ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c index 1b402aa2e6f..e991349993f 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c @@ -417,7 +417,6 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen, ? screen->specs.max_ps_uniforms * sizeof(float[4]) : screen->specs.max_vs_uniforms * sizeof(float[4]); case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return false; case PIPE_SHADER_CAP_SUPPORTED_IRS: diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 984c803a562..1dfb78284bf 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -685,7 +685,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, return is_ir3(screen) ? 1 : 0; case PIPE_SHADER_CAP_SUBROUTINES: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 80a425bb213..f448447fcfd 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -365,7 +365,6 @@ i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader, case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return I915_TEX_UNITS; case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index c71e8577374..26088f902a2 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -550,7 +550,6 @@ iris_get_shader_param(struct pipe_screen *pscreen, } case PIPE_SHADER_CAP_DROUND_SUPPORTED: return 1; - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: return 0; diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index 7134f040a29..f8d108845ec 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -364,7 +364,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: @@ -416,7 +415,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 61518835e41..c4a9eecf336 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -516,7 +516,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_TGSI) | (1 << PIPE_SHADER_IR_NIR); case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index b301326f0fd..5c3bc284704 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -538,7 +538,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, return 1; case PIPE_SHADER_CAP_DROUND_SUPPORTED: return 1; - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_INT64_ATOMICS: case PIPE_SHADER_CAP_FP16: diff --git a/src/gallium/drivers/panfrost/pan_screen.c b/src/gallium/drivers/panfrost/pan_screen.c index bfcca51c69d..74f9bf21996 100644 --- a/src/gallium/drivers/panfrost/pan_screen.c +++ b/src/gallium/drivers/panfrost/pan_screen.c @@ -458,7 +458,6 @@ panfrost_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_INT64_ATOMICS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 0; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index e0653bac2a2..a4ce4d877a8 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -311,7 +311,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: @@ -401,7 +400,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 29e590b91c7..404232488e2 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -637,7 +637,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, return ir; } case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: return 0; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index e7bd4d4b061..0e21a4bffc4 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -498,7 +498,6 @@ static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_typ case PIPE_SHADER_CAP_INT64_ATOMICS: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: /* lowered in finalize_nir */ case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: /* lowered in finalize_nir */ return 1; diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index b50e84fbeb9..426c8e4ee7f 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -536,7 +536,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_TGSI) | (svgascreen->debug.nir ? (1 << PIPE_SHADER_IR_NIR) : 0); case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: @@ -601,7 +600,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_TGSI) | (svgascreen->debug.nir ? (1 << PIPE_SHADER_IR_NIR) : 0); case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: @@ -711,7 +709,6 @@ vgpu10_get_shader_param(struct pipe_screen *screen, else return 0; case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: /* For the above cases, we rely on the GLSL compiler to translate/lower * the TGIS instruction into other instructions we do support. */ diff --git a/src/gallium/drivers/v3d/v3d_screen.c b/src/gallium/drivers/v3d/v3d_screen.c index 916c6fff0d2..4f4e3150786 100644 --- a/src/gallium/drivers/v3d/v3d_screen.c +++ b/src/gallium/drivers/v3d/v3d_screen.c @@ -431,7 +431,6 @@ v3d_screen_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type s case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c index 5b7ae10acc7..4a0e34956fe 100644 --- a/src/gallium/drivers/vc4/vc4_screen.c +++ b/src/gallium/drivers/vc4/vc4_screen.c @@ -294,7 +294,6 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 0; case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c index eeed5880851..8825f071c46 100644 --- a/src/gallium/drivers/zink/zink_screen.c +++ b/src/gallium/drivers/zink/zink_screen.c @@ -1204,7 +1204,6 @@ zink_get_shader_param(struct pipe_screen *pscreen, PIPE_MAX_SAMPLERS); case PIPE_SHADER_CAP_DROUND_SUPPORTED: - case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: return 0; /* not implemented */ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index 90f72a5a3e2..2a6920b1d53 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -1116,7 +1116,6 @@ enum pipe_shader_cap PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED, PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS, PIPE_SHADER_CAP_DROUND_SUPPORTED, /* all rounding modes */ - PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED, PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE, PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, PIPE_SHADER_CAP_SUPPORTED_IRS, diff --git a/src/mesa/state_tracker/st_glsl_to_ir.cpp b/src/mesa/state_tracker/st_glsl_to_ir.cpp index 457cc142ec1..8322836a9ab 100644 --- a/src/mesa/state_tracker/st_glsl_to_ir.cpp +++ b/src/mesa/state_tracker/st_glsl_to_ir.cpp @@ -64,8 +64,6 @@ link_shader(struct gl_context *ctx, struct gl_shader_program *prog) enum pipe_shader_type ptarget = pipe_shader_type_from_mesa(stage); bool have_dround = pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_DROUND_SUPPORTED); - bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget, - PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED); if (!pscreen->get_param(pscreen, PIPE_CAP_INT64_DIVMOD)) lower_64bit_integer_instructions(ir, DIV64 | MOD64); @@ -79,7 +77,7 @@ link_shader(struct gl_context *ctx, struct gl_shader_program *prog) lower_blend_equation_advanced( shader, ctx->Extensions.KHR_blend_equation_advanced_coherent); - lower_instructions(ir, have_dfrexp, have_dround, + lower_instructions(ir, have_dround, ctx->Extensions.ARB_gpu_shader5); do_vec_index_to_cond_assign(ir);
