Module: Mesa Branch: main Commit: ca7a2e508dde656347a27708de9febef72667230 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca7a2e508dde656347a27708de9febef72667230
Author: Dave Airlie <[email protected]> Date: Fri Mar 17 14:13:06 2023 +1000 radv/winsys: handle encoder queue padding/submits. The encoder queue doesn't like padding at all, don't pad in the sysmem paths for encoder queue. The encoder queue will be using on gfx11 for decoding. Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980> --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index c6fae4f977a..84967030b7a 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c @@ -299,6 +299,8 @@ static uint32_t get_nop_packet(struct radv_amdgpu_cs *cs) return PKT2_NOP_PAD; case AMDGPU_HW_IP_VCN_DEC: return 0x81FF; + case AMDGPU_HW_IP_VCN_ENC: + return 0; /* NOPs are illegal in encode, so don't pad */ default: unreachable("Unknown IP type"); } @@ -413,8 +415,10 @@ radv_amdgpu_cs_finalize(struct radeon_cmdbuf *_cs) *cs->ib_size_ptr |= cs->base.cdw; } else { /* Pad the CS with NOP packets. */ - while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask)) - radeon_emit(&cs->base, nop_packet); + if (ip_type != AMDGPU_HW_IP_VCN_ENC) { + while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask)) + radeon_emit(&cs->base, nop_packet); + } /* Append the current (last) IB to the array of old IB buffers. */ radv_amdgpu_cs_add_old_ib_buffer(cs);
