Module: Mesa
Branch: main
Commit: faf27fa0a29452d2ecf4345e59f0c3ce65dc665a
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=faf27fa0a29452d2ecf4345e59f0c3ce65dc665a

Author: Samuel Pitoiset <[email protected]>
Date:   Fri Apr 28 14:49:49 2023 +0200

ac/nir: fix 8-bit/10-bit PS exports clamping

This broke many tests on GFX6 (Pitcairn).

Fixes: c1821544562 ("ac/nir: add ac_nir_lower_ps")
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22756>

---

 src/amd/common/ac_nir_lower_ps.c | 39 ++++++++++++++++++++++++++++-----------
 1 file changed, 28 insertions(+), 11 deletions(-)

diff --git a/src/amd/common/ac_nir_lower_ps.c b/src/amd/common/ac_nir_lower_ps.c
index 5c7775d288b..0af7b393c07 100644
--- a/src/amd/common/ac_nir_lower_ps.c
+++ b/src/amd/common/ac_nir_lower_ps.c
@@ -557,7 +557,6 @@ emit_ps_color_export(nir_builder *b, lower_ps_state *s, 
gl_frag_result slot, uns
 
    default: {
       nir_op pack_op = nir_op_pack_32_2x16;
-      bool need_clamp = false;
 
       switch (spi_shader_col_format) {
       case V_028714_SPI_SHADER_FP16_ABGR:
@@ -567,13 +566,39 @@ emit_ps_color_export(nir_builder *b, lower_ps_state *s, 
gl_frag_result slot, uns
       case V_028714_SPI_SHADER_UINT16_ABGR:
          if (type_size == 32) {
             pack_op = nir_op_pack_uint_2x16;
-            need_clamp = is_int8 || is_int10;
+            if (is_int8 || is_int10) {
+               /* clamp 32bit output for 8/10 bit color component */
+               uint32_t max_rgb = is_int8 ? 255 : 1023;
+
+               for (int i = 0; i < 4; i++) {
+                  if (!data[i])
+                     continue;
+
+                  uint32_t max_value = i == 3 && is_int10 ? 3 : max_rgb;
+                  data[i] = nir_umin(b, data[i], nir_imm_int(b, max_value));
+               }
+            }
          }
          break;
       case V_028714_SPI_SHADER_SINT16_ABGR:
          if (type_size == 32) {
             pack_op = nir_op_pack_sint_2x16;
-            need_clamp = is_int8 || is_int10;
+            if (is_int8 || is_int10) {
+               /* clamp 32bit output for 8/10 bit color component */
+               uint32_t max_rgb = is_int8 ? 127 : 511;
+               uint32_t min_rgb = is_int8 ? -128 : -512;
+
+               for (int i = 0; i < 4; i++) {
+                  if (!data[i])
+                     continue;
+
+                  uint32_t max_value = i == 3 && is_int10 ? 1 : max_rgb;
+                  uint32_t min_value = i == 3 && is_int10 ? -2u : min_rgb;
+
+                  data[i] = nir_imin(b, data[i], nir_imm_int(b, max_value));
+                  data[i] = nir_imax(b, data[i], nir_imm_int(b, min_value));
+               }
+            }
          }
          break;
       case V_028714_SPI_SHADER_UNORM16_ABGR:
@@ -587,14 +612,6 @@ emit_ps_color_export(nir_builder *b, lower_ps_state *s, 
gl_frag_result slot, uns
          break;
       }
 
-      /* clamp 32bit output for 8/10 bit color component */
-      for (int i = 0; i < 4; i++) {
-         if (need_clamp && data[i]) {
-            int max_value = is_int10 ? (i == 3 ? 3 : 1023) : 255;
-            data[i] = nir_umin(b, data[i], nir_imm_int(b, max_value));
-         }
-      }
-
       for (int i = 0; i < 2; i++) {
          nir_ssa_def *lo = data[i * 2];
          nir_ssa_def *hi = data[i * 2 + 1];

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