Module: Mesa Branch: main Commit: 07ec481cd824a79cd526d6707a4db564336de9cf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07ec481cd824a79cd526d6707a4db564336de9cf
Author: Felix DeGrood <[email protected]> Date: Wed Apr 26 20:13:58 2023 +0000 intel: batch consecutive dispatches into implicit renderpasses Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723> --- src/intel/common/intel_measure.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/common/intel_measure.c b/src/intel/common/intel_measure.c index e8d5dfb046b..86950056c60 100644 --- a/src/intel/common/intel_measure.c +++ b/src/intel/common/intel_measure.c @@ -305,9 +305,9 @@ intel_measure_state_changed(const struct intel_measure_batch *batch, } if (config.flags & INTEL_MEASURE_RENDERPASS) { - return ((last_snap->renderpass != batch->renderpass) || - /* compute workloads are always in their own renderpass */ - (cs != 0)); + bool new_renderpass = !cs && last_snap->renderpass != batch->renderpass; + bool new_compute_block = cs && last_snap->type != INTEL_SNAPSHOT_COMPUTE; + return new_renderpass || new_compute_block; } /* remaining comparisons check the state of the render pipeline for
