URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1dd36a74e17ca8895765d892e544e3eff349fea
Author: Qiang Yu <[email protected]>
Date: Thu Apr 27 19:55:25 2023 +0800
radeonsi: be able to use aco compiler for mono ps
Need to set AMD_DEBUG=useaco environment variable.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=288adae5128342db827380f3b1f017db5fa6887a
Author: Qiang Yu <[email protected]>
Date: Mon Apr 24 16:42:11 2023 +0800
radeonsi: fixup sampler desc for tg4 in nir
For ACO which won't do this for us. But we still can't
remove the same code in llvm because non-uniform sampler
is keept as index in nir.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=521cbcb588693ba44c05d856a968ad09cb941286
Author: Qiang Yu <[email protected]>
Date: Mon Apr 24 16:33:02 2023 +0800
ac/llvm,radeonsi: enable lower_array_layer_round_even
ACO need this to be done in nir. Remove the llvm round code
because both radv and radeonsi do this in nir for both aco
and llvm.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=38e064b674b5f0e8203d4d8f6d6424f5c389f516
Author: Qiang Yu <[email protected]>
Date: Tue Apr 18 16:01:08 2023 +0800
radeonsi: clamp shadow texture reference in nir for aco
This is ported from the LLVM ac_shader_abi->clamp_shadow_reference
code.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5409131efc9c72348a0a8d3b265b986ba2f9e57
Author: Qiang Yu <[email protected]>
Date: Thu Apr 27 19:45:11 2023 +0800
radeonsi: pass use_aco to ac_nir_lower_ps
For dual source blend code emition in aco.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7180b16afcaa7be13c0f9cfcfdcc56ea0f5b05b7
Author: Qiang Yu <[email protected]>
Date: Thu Apr 27 19:30:21 2023 +0800
radeonsi: adjust ps args for aco
aco need explicite args including PS arg compaction and
scratch_offset.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=474ddeffe67ed23b4065731013f99b3de5cc346e
Author: Qiang Yu <[email protected]>
Date: Wed Apr 26 16:31:44 2023 +0800
radeonsi: resolve aco scratch addr symbols
Used for scratch buffer operation and reg spill when aco.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aac3508dca2e5c7590d89fe0963d6c06685bef1
Author: Qiang Yu <[email protected]>
Date: Wed Apr 26 10:40:58 2023 +0800
radeonsi: add symbols to si_shader_binary
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a360e4a71a9978b25a84c4b57e1a7200824ad70
Author: Qiang Yu <[email protected]>
Date: Fri Apr 14 17:21:45 2023 +0800
radeonsi: add initial aco compile code
Only for monolithic PS.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=91c91bb972bcb219b4a3c01a14262982284fda23
Author: Qiang Yu <[email protected]>
Date: Thu Apr 27 19:33:32 2023 +0800
radeonsi: lower non uniform texture access when aco
aco need all resource have been lowered to descriptor.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f859436b55711684602336f8d9a8dc498ad5fe16
Author: Qiang Yu <[email protected]>
Date: Fri Apr 14 18:41:00 2023 +0800
radeonsi: add has_non_uniform_tex_access shader info
Can be used to skip nir_lower_non_uniform_access pass.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=563bdcc7fc86b4a2efe15d77163db7460951d7c0
Author: Qiang Yu <[email protected]>
Date: Thu Apr 27 19:41:24 2023 +0800
radeonsi: lower vector const to scalar at last for aco
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e252d8781613c854b1e2e6da4b87757dd0f9bc56
Author: Qiang Yu <[email protected]>
Date: Tue May 9 17:52:30 2023 +0800
radeonsi: lower some 64bit ops aco does not support
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bc1fb4c07fa3ea50a71c434b5f8161bc0954bb4
Author: Qiang Yu <[email protected]>
Date: Mon Apr 17 18:01:09 2023 +0800
ac/llvm,radeonsi: lower nir_fpow for aco and llvm
aco does not implement fpow, need nir to lower it
first. llvm will do by itself in the same way, so
we always lower fpow in nir now.
Remove the llvm fpow implementation that has special
handling for the muliplication. It's not used any
more and does not match GLSL spec as fpow(0,0)=NaN
but here we get 0.
There's some pixel changes for gl-radeonsi-stoney:
ror-default 2 (no tolerance), 0 (1% tol.)
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19a8626f8652b9ce5c1eaba249c64733141db39c
Author: Qiang Yu <[email protected]>
Date: Fri Apr 14 15:58:31 2023 +0800
ac/llvm,radeonsi: lower some pack/unpack ops not supported by aco
aco only support the split vertion of these instructions.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb2d0fb4a2beac2d76afc1d4112b57a029f0f979
Author: Qiang Yu <[email protected]>
Date: Tue May 9 17:48:24 2023 +0800
ac/llvm,radeonsi: lower ineg in nir
aco does not implement it.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fae161ff2266e9d6e28e5d63bc4f10f8170063f
Author: Qiang Yu <[email protected]>
Date: Sat Apr 15 16:10:57 2023 +0800
ac/llvm,radeonsi: lower txf offset in nir
aco will complain if txf has offset. Not if other
texture ops.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f13f9044db26878ac77b4f760272115fac0f424e
Author: Qiang Yu <[email protected]>
Date: Fri Apr 14 21:05:05 2023 +0800
ac/llvm,radeonsi: lower fsin/fcos in nir
ACO only support nir_fsin/cos_amd.
There's some pixel changes for gl-radeonsi-stoney trace.
Different pixels:
furmark 61 (no tolerance), 0 (1% tol.)
gimark 93867 (no tolerance), 888 (1% tol.)
tessmark 39 (no tolerance), 0 (1% tol.)
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9d54b1d36bcb536f3f5efbd2135a4459698e93b
Author: Qiang Yu <[email protected]>
Date: Sat Apr 15 14:35:27 2023 +0800
ac/llvm,radeonsi: lower idiv in nir
aco does not implement these idiv ops.
nir_lower_idiv is for idiv ops <= 32bit and ported from
llvm amdgpu, so llvm do the same.
nir_lower_divmod64 is for 64bit idiv ops.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fa06828b486c5a21757d7edd6dce5914dafa7d6
Author: Qiang Yu <[email protected]>
Date: Tue May 9 17:01:19 2023 +0800
tgsi_to_nir: call nir_lower_int64 when required
Use case: radeonsi will generate internal tgsi shader
with 64bit udiv instruction, and we want all 64bit udiv
to be lowered in nir by lower_int64_options.
For GLSL shaders, this is done in glsl to nir, so we do
the same for tgsi here.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=636f6282062e2fd57167be71788cc5707064d9d6
Author: Qiang Yu <[email protected]>
Date: Thu Apr 13 14:19:19 2023 +0800
radeonsi: remove ps vgpr index save when args init
They will be set by ac_get_fs_input_vgpr_cnt() later anyway.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1eddf5934b521b108c0bf3ab396a2b380873c4c2
Author: Qiang Yu <[email protected]>
Date: Fri Apr 14 16:54:03 2023 +0800
radeonsi: support print raw shader binary
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff29502df2daa824dfca7868f101fa8a28b11c4e
Author: Qiang Yu <[email protected]>
Date: Thu Apr 13 08:54:44 2023 +0800
radeonsi: support raw shader binary upload
Only monolithic shader.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b903475952d43b4acd2dbe433977dc747249c6f
Author: Qiang Yu <[email protected]>
Date: Sun Apr 23 17:23:23 2023 +0800
ac/binary: pack prefech align code to a function
To be used by radeonsi raw shader binary.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3997a3ca70d7e24d2a1375a5c322b68a30077ca
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 21:44:13 2023 +0800
radeonsi: add a raw shader binary type
It's the output of ACO compiler. To share the si_shader_binary
struct with ELF type:
* add a type field to indicate RAW or ELF
* rename elf_buffer/size to code_buffer/size
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=83a920dfb9a753aeeaa75dca177a705c05cb348a
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 18:38:18 2023 +0800
radeonsi: init spi ps input shader config when aco
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f954aa1624bde2f0aa919c9da07d85447133cb36
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 18:24:12 2023 +0800
radeonsi: pack spi ps input fixup to a function
To be shared with ACO spi ps input construction.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e752248b3b85f8850a2f85fcefe6826d57730049
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 15:37:06 2023 +0800
radeonsi: add shader info uses_sampleid
Used by ACO to set spi_ps_intput.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=14d2b12390bec3ecab578f21f4319165814e2df7
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 14:53:47 2023 +0800
radeonsi: add shader info for frag coord and sample pos read
To construct spi_ps_input when ACO compilation.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=326b027b25fb3595e7b766286673b2b34b1f4a82
Author: Qiang Yu <[email protected]>
Date: Wed Apr 12 10:05:18 2023 +0800
radeonsi: add use_aco field for struct si_shader
We are going to use aco for monolithic ps first.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad33ff4de2fb0034be50584b8291efee89b3dca7
Author: Qiang Yu <[email protected]>
Date: Wed Apr 5 19:50:43 2023 +0800
radeonsi: add aco debug option
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5bc6c62486207e3d6f773e66620bab008868ac0d
Author: Qiang Yu <[email protected]>
Date: Wed Apr 5 19:44:19 2023 +0800
meson: build radeonsi with aco
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
