Module: Mesa Branch: main Commit: 60b0d2c2cbea0c1541a2e98e22a71b7fa4a8d27d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=60b0d2c2cbea0c1541a2e98e22a71b7fa4a8d27d
Author: Tapani Pälli <[email protected]> Date: Wed Jan 18 14:33:27 2023 +0200 anv: add required invalidate/flush for Wa_14014427904 This WA impacts skus with multiple CCS, e.g. ATS-M. According to description, we need to add a pipe control before following NP state commands: STATE_BASE_ADDRESS 3DSTATE_BTD CHROMA_KEY STATE_SIP STATE_COMPUTE_MODE Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784> --- src/intel/vulkan/genX_cmd_buffer.c | 18 ++++++++++++++++++ src/intel/vulkan/genX_state.c | 18 ++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 44441e1f30d..505a7a703b2 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -6300,6 +6300,24 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer, } } +#if GFX_VER >= 125 + /* Wa_14014427904 - We need additional invalidate/flush when + * emitting NP state commands with ATS-M in compute mode. + */ + if (intel_device_info_is_atsm(device->info) && + cmd_buffer->queue_family->engine_class == INTEL_ENGINE_CLASS_COMPUTE) { + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.CommandStreamerStallEnable = true; + pc.StateCacheInvalidationEnable = true; + pc.ConstantCacheInvalidationEnable = true; + pc.UntypedDataPortCacheFlushEnable = true; + pc.TextureCacheInvalidationEnable = true; + pc.InstructionCacheInvalidateEnable = true; + pc.HDCPipelineFlushEnable = true; + } + } +#endif + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_BTD), btd) { /* TODO: This is the timeout after which the bucketed thread dispatcher * will kick off a wave of threads. We go with the lowest value diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 9d735e49d19..e025557b41a 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -179,6 +179,24 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) device->l3_config = cfg; #endif +#if GFX_VER >= 125 + /* Wa_14014427904 - We need additional invalidate/flush when + * emitting NP state commands with ATS-M in compute mode. + */ + if (intel_device_info_is_atsm(device->info) && + queue->family->engine_class == INTEL_ENGINE_CLASS_COMPUTE) { + anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) { + pc.CommandStreamerStallEnable = true; + pc.StateCacheInvalidationEnable = true; + pc.ConstantCacheInvalidationEnable = true; + pc.UntypedDataPortCacheFlushEnable = true; + pc.TextureCacheInvalidationEnable = true; + pc.InstructionCacheInvalidateEnable = true; + pc.HDCPipelineFlushEnable = true; + } + } +#endif + /* Emit STATE_BASE_ADDRESS on Gfx12+ because we set a default CPS_STATE and * those are relative to STATE_BASE_ADDRESS::DynamicStateBaseAddress. */
