Module: Mesa Branch: main Commit: c5ca2bed51302ac72f5524afe5403e85421c259f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5ca2bed51302ac72f5524afe5403e85421c259f
Author: Jordan Justen <[email protected]> Date: Thu Jun 22 14:44:20 2023 -0700 anv: Clear untyped dataport cache flush bit if not in GPGPU mode This should be equivalent, but refactoring the code will allow the next two patches to use an else block for this check. Signed-off-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176> --- src/intel/vulkan/genX_cmd_buffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index f515b4c9587..6d1da689339 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -1558,9 +1558,9 @@ genX(emit_apply_pipe_flushes)(struct anv_batch *batch, * So there is no need to set "Untyped Data-Port Cache" in 3D * mode. */ - if ((flush_bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) && - current_pipeline != GPGPU) + if (current_pipeline != GPGPU) { flush_bits &= ~ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT; + } if (flush_bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) flush_bits |= ANV_PIPE_HDC_PIPELINE_FLUSH_BIT;
