Module: Mesa Branch: main Commit: 36ff6c0004a0d7820abb56c07a80b40184d096ec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=36ff6c0004a0d7820abb56c07a80b40184d096ec
Author: Marcin Ślusarz <[email protected]> Date: Mon Jul 10 14:05:37 2023 +0200 intel/compiler: remove NV_mesh_shader support Reviewed-by: Ivan Briano <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24071> --- src/intel/compiler/brw_fs.cpp | 6 +----- src/intel/compiler/brw_mesh.cpp | 17 ++++------------- src/intel/compiler/brw_nir.c | 5 ++--- 3 files changed, 7 insertions(+), 21 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 46552fe4dfa..be692dab709 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7715,11 +7715,7 @@ fs_visitor::emit_work_group_id_setup() bld.MOV(offset(id, bld, 1), r0_6); bld.MOV(offset(id, bld, 2), r0_7); } else { - /* NV Task/Mesh have a single Workgroup ID dimension in the HW. */ - assert(gl_shader_stage_is_mesh(stage)); - assert(nir->info.mesh.nv); - bld.MOV(offset(id, bld, 1), brw_imm_ud(0)); - bld.MOV(offset(id, bld, 2), brw_imm_ud(0)); + unreachable("workgroup id should not be used in non-compute stage"); } return id; diff --git a/src/intel/compiler/brw_mesh.cpp b/src/intel/compiler/brw_mesh.cpp index 4ee76c99a08..f377bfc15a6 100644 --- a/src/intel/compiler/brw_mesh.cpp +++ b/src/intel/compiler/brw_mesh.cpp @@ -788,12 +788,6 @@ struct index_packing_state { static bool brw_can_pack_primitive_indices(nir_shader *nir, struct index_packing_state *state) { - /* NV_mesh_shader primitive indices are stored as a flat array instead - * of an array of primitives. Don't bother with this for now. - */ - if (nir->info.mesh.nv) - return false; - /* can single index fit into one byte of U888X format? */ if (nir->info.mesh.max_vertices_out > 255) return false; @@ -1549,19 +1543,16 @@ fs_visitor::nir_emit_task_mesh_intrinsic(const fs_builder &bld, bld.MOV(dest, payload.extended_parameter_0); break; - case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_local_invocation_id: + unreachable("local invocation id should have been lowered earlier"); + break; + + case nir_intrinsic_load_local_invocation_index: dest = retype(dest, BRW_REGISTER_TYPE_UD); bld.MOV(dest, payload.local_index); - /* Task/Mesh only use one dimension. */ - if (instr->intrinsic == nir_intrinsic_load_local_invocation_id) { - bld.MOV(offset(dest, bld, 1), brw_imm_uw(0)); - bld.MOV(offset(dest, bld, 2), brw_imm_uw(0)); - } break; case nir_intrinsic_load_num_workgroups: - assert(!nir->info.mesh.nv); dest = retype(dest, BRW_REGISTER_TYPE_UD); bld.MOV(offset(dest, bld, 0), brw_uw1_grf(0, 13)); /* g0.6 >> 16 */ bld.MOV(offset(dest, bld, 1), brw_uw1_grf(0, 8)); /* g0.4 & 0xffff */ diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 415502e4cb1..bc06cb4bf0f 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1174,7 +1174,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler, if (producer->info.stage == MESA_SHADER_MESH && consumer->info.stage == MESA_SHADER_FRAGMENT) { uint64_t fs_inputs = 0, ms_outputs = 0; - /* gl_MeshPerPrimitiveNV[].gl_ViewportIndex, gl_PrimitiveID and gl_Layer + /* gl_MeshPerPrimitiveEXT[].gl_ViewportIndex, gl_PrimitiveID and gl_Layer * are per primitive, but fragment shader does not have them marked as * such. Add the annotation here. */ @@ -1286,8 +1286,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler, } if (producer->info.stage == MESA_SHADER_TASK && - consumer->info.stage == MESA_SHADER_MESH && - !consumer->info.mesh.nv) { + consumer->info.stage == MESA_SHADER_MESH) { for (unsigned i = 0; i < 3; ++i) assert(producer->info.mesh.ts_mesh_dispatch_dimensions[i] <= UINT16_MAX);
