Module: Mesa Branch: main Commit: 614efeeafec12dc64178ebd4f461b60bf538a13f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=614efeeafec12dc64178ebd4f461b60bf538a13f
Author: Rohan Garg <[email protected]> Date: Thu Jun 29 19:10:10 2023 +0200 intel/genxml: set a default value for "Pixel Position Offset Enable" in genxml Set the default value for "Pixel Position Offset Enable" when emitting 3DSTATE_MULTISAMPLE in the genxml so that we can drop it from blorp and genX_state. Signed-off-by: Rohan Garg <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23936> --- src/intel/blorp/blorp_genX_exec.h | 15 +++------------ src/intel/genxml/gen11.xml | 2 +- src/intel/genxml/gen12.xml | 2 +- src/intel/genxml/gen125.xml | 2 +- src/intel/genxml/gen8.xml | 2 +- src/intel/genxml/gen9.xml | 2 +- src/intel/vulkan_hasvk/genX_state.c | 9 +-------- 7 files changed, 9 insertions(+), 25 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 8a39f1b2ecb..c352406cfc3 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1276,16 +1276,8 @@ blorp_emit_3dstate_multisample(struct blorp_batch *batch, { blorp_emit(batch, GENX(3DSTATE_MULTISAMPLE), ms) { ms.NumberofMultisamples = __builtin_ffs(params->num_samples) - 1; - -#if GFX_VER >= 8 - /* The PRM says that this bit is valid only for DX9: - * - * SW can choose to set this bit only for DX9 API. DX10/OGL API's - * should not have any effect by setting or not setting this bit. - */ - ms.PixelPositionOffsetEnable = false; -#elif GFX_VER >= 7 - + ms.PixelLocation = CENTER; +#if GFX_VER >= 7 && GFX_VER < 8 switch (params->num_samples) { case 1: INTEL_SAMPLE_POS_1X(ms.Sample); @@ -1302,10 +1294,9 @@ blorp_emit_3dstate_multisample(struct blorp_batch *batch, default: break; } -#else +#elif GFX_VER < 7 INTEL_SAMPLE_POS_4X(ms.Sample); #endif - ms.PixelLocation = CENTER; } } diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml index fbc97ea9e70..d1853a638ea 100644 --- a/src/intel/genxml/gen11.xml +++ b/src/intel/genxml/gen11.xml @@ -1930,7 +1930,7 @@ <value name="CENTER" value="0" /> <value name="UL_CORNER" value="1" /> </field> - <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" /> + <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" default="0" /> </instruction> <instruction name="3DSTATE_POLY_STIPPLE_OFFSET" bias="2" length="2" engine="render"> <field name="DWord Length" start="0" end="7" type="uint" default="0" /> diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 8c481925500..d65b279b2c1 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -1988,7 +1988,7 @@ <value name="CENTER" value="0" /> <value name="UL_CORNER" value="1" /> </field> - <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" /> + <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" default="0" /> </instruction> <instruction name="3DSTATE_POLY_STIPPLE_OFFSET" bias="2" length="2" engine="render"> <field name="DWord Length" start="0" end="7" type="uint" default="0" /> diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml index 7252cb690db..f3e27ba0cef 100644 --- a/src/intel/genxml/gen125.xml +++ b/src/intel/genxml/gen125.xml @@ -2222,7 +2222,7 @@ <value name="CENTER" value="0" /> <value name="UL_CORNER" value="1" /> </field> - <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" /> + <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" default="0" /> </instruction> <instruction name="3DSTATE_POLY_STIPPLE_OFFSET" bias="2" length="2" engine="render"> <field name="DWord Length" start="0" end="7" type="uint" default="0" /> diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml index 9f6be4633f9..a23b9bf5e73 100644 --- a/src/intel/genxml/gen8.xml +++ b/src/intel/genxml/gen8.xml @@ -1395,7 +1395,7 @@ <value name="CENTER" value="0" /> <value name="UL_CORNER" value="1" /> </field> - <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" /> + <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" default="0" /> </instruction> <instruction name="3DSTATE_POLY_STIPPLE_OFFSET" bias="2" length="2" engine="render"> <field name="DWord Length" start="0" end="7" type="uint" default="0" /> diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml index 537b39e1ea0..59b193863e1 100644 --- a/src/intel/genxml/gen9.xml +++ b/src/intel/genxml/gen9.xml @@ -1745,7 +1745,7 @@ <value name="CENTER" value="0" /> <value name="UL_CORNER" value="1" /> </field> - <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" /> + <field name="Pixel Position Offset Enable" start="37" end="37" type="bool" default="0" /> </instruction> <instruction name="3DSTATE_POLY_STIPPLE_OFFSET" bias="2" length="2" engine="render"> <field name="DWord Length" start="0" end="7" type="uint" default="0" /> diff --git a/src/intel/vulkan_hasvk/genX_state.c b/src/intel/vulkan_hasvk/genX_state.c index 59b9157a002..2850dee34b4 100644 --- a/src/intel/vulkan_hasvk/genX_state.c +++ b/src/intel/vulkan_hasvk/genX_state.c @@ -250,14 +250,7 @@ genX(emit_multisample)(struct anv_batch *batch, uint32_t samples, ms.NumberofMultisamples = __builtin_ffs(samples) - 1; ms.PixelLocation = CENTER; -#if GFX_VER >= 8 - /* The PRM says that this bit is valid only for DX9: - * - * SW can choose to set this bit only for DX9 API. DX10/OGL API's - * should not have any effect by setting or not setting this bit. - */ - ms.PixelPositionOffsetEnable = false; -#else +#if GFX_VER < 8 switch (samples) { case 1: INTEL_SAMPLE_POS_1X_ARRAY(ms.Sample, sl->locations);
