Module: Mesa
Branch: main
Commit: c893fa1fcd3ceab96cf97ca6d82824c6a7d41e23
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c893fa1fcd3ceab96cf97ca6d82824c6a7d41e23

Author: Dr. David Alan Gilbert <[email protected]>
Date:   Fri Jul  7 01:23:47 2023 +0100

rusticl: Wire the 'submit' profiling time up

Set it from the timestamp when it's taken out of the queue and
submitted, and wire the APU up to read it.

Signed-off-by: Dr. David Alan Gilbert <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>

---

 src/gallium/frontends/rusticl/api/event.rs  |  2 +-
 src/gallium/frontends/rusticl/core/event.rs | 12 +++++++++++-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/gallium/frontends/rusticl/api/event.rs 
b/src/gallium/frontends/rusticl/api/event.rs
index 1afd1318c47..bc9e1f77160 100644
--- a/src/gallium/frontends/rusticl/api/event.rs
+++ b/src/gallium/frontends/rusticl/api/event.rs
@@ -51,7 +51,7 @@ impl CLInfo<cl_profiling_info> for cl_event {
         Ok(match *q {
             // TODO
             CL_PROFILING_COMMAND_QUEUED => 
cl_prop::<cl_ulong>(event.get_time(EventTimes::Queued)),
-            CL_PROFILING_COMMAND_SUBMIT => cl_prop::<cl_ulong>(1),
+            CL_PROFILING_COMMAND_SUBMIT => 
cl_prop::<cl_ulong>(event.get_time(EventTimes::Submit)),
             CL_PROFILING_COMMAND_START => cl_prop::<cl_ulong>(2),
             CL_PROFILING_COMMAND_END => cl_prop::<cl_ulong>(3),
             CL_PROFILING_COMMAND_COMPLETE => cl_prop::<cl_ulong>(3),
diff --git a/src/gallium/frontends/rusticl/core/event.rs 
b/src/gallium/frontends/rusticl/core/event.rs
index 34310fb47d4..2c685c3e6f1 100644
--- a/src/gallium/frontends/rusticl/core/event.rs
+++ b/src/gallium/frontends/rusticl/core/event.rs
@@ -27,6 +27,7 @@ pub type EventSig = Box<dyn Fn(&Arc<Queue>, &PipeContext) -> 
CLResult<()>>;
 
 pub enum EventTimes {
     Queued = CL_PROFILING_COMMAND_QUEUED as isize,
+    Submit = CL_PROFILING_COMMAND_SUBMIT as isize,
 }
 
 #[derive(Default)]
@@ -35,6 +36,7 @@ struct EventMutState {
     cbs: [Vec<(EventCB, *mut c_void)>; 3],
     work: Option<EventSig>,
     time_queued: cl_ulong,
+    time_submit: cl_ulong,
 }
 
 pub struct Event {
@@ -136,6 +138,7 @@ impl Event {
         let mut lock = self.state();
         match which {
             EventTimes::Queued => lock.time_queued = value,
+            EventTimes::Submit => lock.time_submit = value,
         }
     }
 
@@ -144,6 +147,7 @@ impl Event {
 
         match which {
             EventTimes::Queued => lock.time_queued,
+            EventTimes::Submit => lock.time_submit,
         }
     }
 
@@ -185,13 +189,19 @@ impl Event {
     pub fn call(&self, ctx: &PipeContext) {
         let mut lock = self.state();
         let status = lock.status;
+        let queue = self.queue.as_ref().unwrap();
+        let profiling_enabled = queue.is_profiling_enabled();
         if status == CL_QUEUED as cl_int {
+            if profiling_enabled {
+                // We already have the lock so can't call set_time on the event
+                lock.time_submit = queue.device.screen().get_timestamp();
+            }
             let work = lock.work.take();
             let new = work.as_ref().map_or(
                 // if there is no work
                 CL_SUBMITTED as cl_int,
                 |w| {
-                    let res = w(self.queue.as_ref().unwrap(), 
ctx).err().map_or(
+                    let res = w(queue, ctx).err().map_or(
                         // if there is an error, negate it
                         CL_SUBMITTED as cl_int,
                         |e| e,

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