Module: Mesa Branch: main Commit: 4f44c47db8b8b7b643f444a36a4f102f65a276ae URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f44c47db8b8b7b643f444a36a4f102f65a276ae
Author: José Roberto de Souza <[email protected]> Date: Mon Jul 10 10:36:49 2023 -0700 intel/aux_map: Mask out bits above index 47 in intel_aux_get_meta_address_mask() The bits above index 47 in l1 entry are used to define format, depth and luminance. aux_address is formated as canonical, so bits above 47 could all be set to 1 causing wrong values being set to format, depth and luminance. intel_aux_get_meta_address_mask() was previously using 2 shifts to mask out bits above index 47, what is not so obvious and are 2 operations, so here doing a AND with VALID_ADDRESS_MASK to make it easier to understand. Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24077> --- src/intel/common/intel_aux_map.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/common/intel_aux_map.c b/src/intel/common/intel_aux_map.c index 53e34872a4b..b023ce03a09 100644 --- a/src/intel/common/intel_aux_map.c +++ b/src/intel/common/intel_aux_map.c @@ -96,6 +96,9 @@ #define INTEL_AUX_MAP_FORMAT_BITS_MASK 0xfff0000000000000ull +/* Mask with the firt 48bits set */ +#define VALID_ADDRESS_MASK ((1ull << 48) - 1) + static const bool aux_map_debug = false; /** @@ -210,7 +213,7 @@ get_index(const uint64_t main_address, uint64_t intel_aux_get_meta_address_mask(struct intel_aux_map_context *ctx) { - return ~get_page_mask(get_meta_page_size(ctx->format)) << 16 >> 16; + return (~get_page_mask(get_meta_page_size(ctx->format))) & VALID_ADDRESS_MASK; } uint64_t
