Module: Mesa
Branch: staging/23.2
Commit: 7d3806c46cac7c33adeedab26cf619ade6b86f89
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d3806c46cac7c33adeedab26cf619ade6b86f89

Author: Iván Briano <[email protected]>
Date:   Wed Jul  5 15:40:52 2023 -0700

anv: ensure mesh is disabled on context init

It turns out the hardware doesn't save the whole state on a context
switch, as the kernel expects when it creates the golden context.
For some HW units, only the state that was explicitly programmed will be
part of it, so we need to make sure mesh shading is disabled on context
creation, or we risk being context switched with an application that
uses mesh, and when ours gets to run again, the mesh state won't be
reset, and submitting a legacy 3D pipeline while the HW thinks mesh is
enabled causes us to hang.

Cc: 23.2 <mesa-stable>

Reviewed-by: Marcin Ślusarz <[email protected]>
Reviewed-by: José Roberto de Souza <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
(cherry picked from commit 7b0ded0b232a21c7459d3f90d766a8d0887a0517)

---

 .pick_status.json             | 2 +-
 src/intel/vulkan/genX_state.c | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/.pick_status.json b/.pick_status.json
index 7dfdb48ee62..f5d142018c9 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1214,7 +1214,7 @@
         "description": "anv: ensure mesh is disabled on context init",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null,
         "notes": null
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index cf998ab0db1..11463b54f26 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -584,6 +584,11 @@ init_render_queue_state(struct anv_queue *queue)
    }
 #endif
 
+#if GFX_VERx10 >= 125
+   anv_batch_emit(&batch, GENX(3DSTATE_MESH_CONTROL), zero);
+   anv_batch_emit(&batch, GENX(3DSTATE_TASK_CONTROL), zero);
+#endif
+
    anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
 
    assert(batch.next <= batch.end);

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