Module: Mesa Branch: main Commit: 54f18b5000223fe9b711ae71d67858863fc7ff4a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=54f18b5000223fe9b711ae71d67858863fc7ff4a
Author: Marek Olšák <[email protected]> Date: Fri Jul 14 17:12:57 2023 -0400 radeonsi: fix a CDNA regression breaking compute reported internally Fixes: 315231b5a519bdc14 - radeonsi: eliminate redundant compute SH register changes Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24169> --- src/gallium/drivers/radeonsi/si_compute.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 4166ae22694..2fb084c8f37 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -1003,6 +1003,10 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info if (sctx->bo_list_add_all_compute_resources) si_compute_resources_add_all_to_bo_list(sctx); + /* Don't optimize any registers on certain CDNA chips, otherwise it would break. */ + if (sctx->family >= CHIP_GFX940 && !sctx->screen->info.has_graphics) + sctx->tracked_regs.other_reg_saved_mask = 0; + /* First emit registers. */ bool prefetch; if (!si_switch_compute_shader(sctx, program, &program->shader, code_object, info->pc, &prefetch,
