Module: Mesa Branch: main Commit: ba071ee81c31de1a47b44140d5a1e18e360873e1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba071ee81c31de1a47b44140d5a1e18e360873e1
Author: Rohan Garg <[email protected]> Date: Fri Jun 30 11:33:58 2023 +0200 anv: use the correct GFX_VERx10 macro for WA Fixes: 60b0d2c2cbea ("add required invalidate/flush for Wa_14014427904") Signed-off-by: Rohan Garg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23937> --- src/intel/vulkan/genX_cmd_buffer.c | 2 +- src/intel/vulkan/genX_state.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index d9df3fa3ace..1afb928b004 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -6367,7 +6367,7 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer, } } -#if GFX_VER >= 125 +#if GFX_VERx10 == 125 /* Wa_14014427904 - We need additional invalidate/flush when * emitting NP state commands with ATS-M in compute mode. */ diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 02fb614e57b..8cd7a6bfbe1 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -194,7 +194,7 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) } #endif -#if GFX_VER >= 125 +#if GFX_VERx10 == 125 /* Wa_14014427904 - We need additional invalidate/flush when * emitting NP state commands with ATS-M in compute mode. */ @@ -210,7 +210,6 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT | ANV_PIPE_HDC_PIPELINE_FLUSH_BIT); } - } #endif /* Emit STATE_BASE_ADDRESS on Gfx12+ because we set a default CPS_STATE and
