Module: Mesa
Branch: main
Commit: d00d9673996794904fc37737eab7ac4fa1c6735c
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d00d9673996794904fc37737eab7ac4fa1c6735c

Author: M Henning <[email protected]>
Date:   Sun Jul 16 19:17:46 2023 -0400

nvc0: Keep nir directly in nvc0_program

instead of under pipe_shader_state.

This makes it obvious that we never produce tgsi shaders since
c3cbe610 "nouveau: Delete the NV50_PROG_USE_TGSI env var."

Reviewed-by: Karol Herbst <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>

---

 src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 23 ++++++-----------------
 src/gallium/drivers/nouveau/nvc0/nvc0_program.h |  4 +++-
 src/gallium/drivers/nouveau/nvc0/nvc0_state.c   | 22 +++++++---------------
 src/gallium/drivers/nouveau/nvc0/nvc0_surface.c |  4 ++--
 4 files changed, 18 insertions(+), 35 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 33edd13b051..3b6feb6c35a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -590,19 +590,8 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
    info->type = prog->type;
    info->target = chipset;
 
-   info->bin.sourceRep = prog->pipe.type;
-   switch (prog->pipe.type) {
-   case PIPE_SHADER_IR_TGSI:
-      info->bin.source = (void *)prog->pipe.tokens;
-      break;
-   case PIPE_SHADER_IR_NIR:
-      info->bin.source = (void *)nir_shader_clone(NULL, prog->pipe.ir.nir);
-      break;
-   default:
-      assert(!"unsupported IR!");
-      free(info);
-      return false;
-   }
+   info->bin.sourceRep = PIPE_SHADER_IR_NIR;
+   info->bin.source = (void *)nir_shader_clone(NULL, prog->nir);
 
 #ifndef NDEBUG
    info->target = debug_get_num_option("NV50_PROG_CHIPSET", chipset);
@@ -747,9 +736,9 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
    if (info_out.io.fp64)
       prog->hdr[0] |= 1 << 27;
 
-   if (prog->pipe.stream_output.num_outputs)
+   if (prog->stream_output.num_outputs)
       prog->tfb = nvc0_program_create_tfb_state(&info_out,
-                                                &prog->pipe.stream_output);
+                                                &prog->stream_output);
 
    util_debug_message(debug, SHADER_INFO,
                       "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, 
bytes: %d, cached: %zd",
@@ -988,7 +977,7 @@ nvc0_program_library_upload(struct nvc0_context *nvc0)
 void
 nvc0_program_destroy(struct nvc0_context *nvc0, struct nvc0_program *prog)
 {
-   const struct pipe_shader_state pipe = prog->pipe;
+   struct nir_shader *nir = prog->nir;
    const uint8_t type = prog->type;
 
    if (prog->mem) {
@@ -1007,7 +996,7 @@ nvc0_program_destroy(struct nvc0_context *nvc0, struct 
nvc0_program *prog)
 
    memset(prog, 0, sizeof(*prog));
 
-   prog->pipe = pipe;
+   prog->nir = nir;
    prog->type = type;
 }
 
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
index 616a6892237..d34321d06a2 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
@@ -5,6 +5,7 @@
 #include "pipe/p_state.h"
 
 #define NVC0_CAP_MAX_PROGRAM_TEMPS 128
+struct nir_shader;
 
 
 struct nvc0_transform_feedback_state {
@@ -20,7 +21,8 @@ struct nvc0_transform_feedback_state {
 #define NVC0_MAX_SHADER_HEADER_SIZE TU102_SHADER_HEADER_SIZE
 
 struct nvc0_program {
-   struct pipe_shader_state pipe;
+   struct nir_shader *nir;
+   struct pipe_stream_output_info stream_output;
 
    uint8_t type;
    bool translated;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index 4f79546f93d..8bdb81c70aa 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -607,15 +607,13 @@ nvc0_sp_state_create(struct pipe_context *pipe,
       return NULL;
 
    prog->type = type;
-   prog->pipe.type = cso->type;
 
    switch(cso->type) {
    case PIPE_SHADER_IR_TGSI:
-      prog->pipe.type = PIPE_SHADER_IR_NIR;
-      prog->pipe.ir.nir = tgsi_to_nir(cso->tokens, pipe->screen, false);
+      prog->nir = tgsi_to_nir(cso->tokens, pipe->screen, false);
       break;
    case PIPE_SHADER_IR_NIR:
-      prog->pipe.ir.nir = cso->ir.nir;
+      prog->nir = cso->ir.nir;
       break;
    default:
       assert(!"unsupported IR!");
@@ -624,7 +622,7 @@ nvc0_sp_state_create(struct pipe_context *pipe,
    }
 
    if (cso->stream_output.num_outputs)
-      prog->pipe.stream_output = cso->stream_output;
+      prog->stream_output = cso->stream_output;
 
    prog->translated = nvc0_program_translate(
       prog, nvc0_context(pipe)->screen->base.device->chipset,
@@ -644,10 +642,7 @@ nvc0_sp_state_delete(struct pipe_context *pipe, void 
*hwcso)
    nvc0_program_destroy(nvc0_context(pipe), prog);
    simple_mtx_unlock(&nvc0->screen->state_lock);
 
-   if (prog->pipe.type == PIPE_SHADER_IR_TGSI)
-      FREE((void *)prog->pipe.tokens);
-   else if (prog->pipe.type == PIPE_SHADER_IR_NIR)
-      ralloc_free(prog->pipe.ir.nir);
+   ralloc_free(prog->nir);
    FREE(prog);
 }
 
@@ -741,7 +736,6 @@ nvc0_cp_state_create(struct pipe_context *pipe,
    if (!prog)
       return NULL;
    prog->type = PIPE_SHADER_COMPUTE;
-   prog->pipe.type = cso->ir_type;
 
    prog->cp.smem_size = cso->static_shared_mem;
    prog->parm_size = cso->req_input_mem;
@@ -749,20 +743,18 @@ nvc0_cp_state_create(struct pipe_context *pipe,
    switch(cso->ir_type) {
    case PIPE_SHADER_IR_TGSI: {
       const struct tgsi_token *tokens = cso->prog;
-      prog->pipe.type = PIPE_SHADER_IR_NIR;
-      prog->pipe.ir.nir = tgsi_to_nir(tokens, pipe->screen, false);
+      prog->nir = tgsi_to_nir(tokens, pipe->screen, false);
       break;
    }
    case PIPE_SHADER_IR_NIR:
-      prog->pipe.ir.nir = (nir_shader *)cso->prog;
+      prog->nir = (nir_shader *)cso->prog;
       break;
    case PIPE_SHADER_IR_NIR_SERIALIZED: {
       struct blob_reader reader;
       const struct pipe_binary_program_header *hdr = cso->prog;
 
       blob_reader_init(&reader, hdr->blob, hdr->num_bytes);
-      prog->pipe.ir.nir = nir_deserialize(NULL, 
pipe->screen->get_compiler_options(pipe->screen, PIPE_SHADER_IR_NIR, 
PIPE_SHADER_COMPUTE), &reader);
-      prog->pipe.type = PIPE_SHADER_IR_NIR;
+      prog->nir = nir_deserialize(NULL, 
pipe->screen->get_compiler_options(pipe->screen, PIPE_SHADER_IR_NIR, 
PIPE_SHADER_COMPUTE), &reader);
       break;
    }
    default:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 9b1f937b0a0..da5f20b444f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -1767,7 +1767,7 @@ nvc0_blitter_destroy(struct nvc0_screen *screen)
          struct nvc0_program *prog = blitter->fp[i][m];
          if (prog) {
             nvc0_program_destroy(NULL, prog);
-            ralloc_free((void *)prog->pipe.ir.nir);
+            ralloc_free((void *)prog->nir);
             FREE(prog);
          }
       }
@@ -1775,7 +1775,7 @@ nvc0_blitter_destroy(struct nvc0_screen *screen)
    if (blitter->vp) {
       struct nvc0_program *prog = blitter->vp;
       nvc0_program_destroy(NULL, prog);
-      ralloc_free((void *)prog->pipe.ir.nir);
+      ralloc_free((void *)prog->nir);
       FREE(prog);
    }
 

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