Module: Mesa
Branch: staging/23.1
Commit: 1dc1a1b5510f8c57cbd73410a99cd6c87e183f25
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dc1a1b5510f8c57cbd73410a99cd6c87e183f25

Author: Mike Blumenkrantz <[email protected]>
Date:   Mon Jul 17 09:16:43 2023 -0400

zink: emit SpvCapabilitySampleMaskPostDepthCoverage with 
SpvExecutionModePostDepthCoverage

can't have one without the other

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24183>
(cherry picked from commit 88bf4b61af84e301d337b63b4b6bbb93def3c727)

---

 .pick_status.json                                    | 2 +-
 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index ad92b02e61b..0a5c45e45bd 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -328,7 +328,7 @@
         "description": "zink: emit SpvCapabilitySampleMaskPostDepthCoverage 
with SpvExecutionModePostDepthCoverage",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c 
b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 12feced58a0..ff191872f0a 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -4415,9 +4415,6 @@ nir_to_spirv(struct nir_shader *s, const struct 
zink_shader_info *sinfo, uint32_
 
    switch (s->info.stage) {
    case MESA_SHADER_FRAGMENT:
-      if (s->info.fs.post_depth_coverage &&
-          BITSET_TEST(s->info.system_values_read, SYSTEM_VALUE_SAMPLE_MASK_IN))
-         spirv_builder_emit_cap(&ctx.builder, 
SpvCapabilitySampleMaskPostDepthCoverage);
       if (s->info.fs.uses_sample_shading)
          spirv_builder_emit_cap(&ctx.builder, SpvCapabilitySampleRateShading);
       if (s->info.fs.uses_demote && spirv_version < SPIRV_VERSION(1, 6))
@@ -4634,6 +4631,7 @@ nir_to_spirv(struct nir_shader *s, const struct 
zink_shader_info *sinfo, uint32_
                                       SpvExecutionModeEarlyFragmentTests);
       if (s->info.fs.post_depth_coverage) {
          spirv_builder_emit_extension(&ctx.builder, 
"SPV_KHR_post_depth_coverage");
+         spirv_builder_emit_cap(&ctx.builder, 
SpvCapabilitySampleMaskPostDepthCoverage);
          spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
                                       SpvExecutionModePostDepthCoverage);
       }

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