Module: Mesa
Branch: main
Commit: e60ff83834df6e2ef3180771c3d25b5879596096
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e60ff83834df6e2ef3180771c3d25b5879596096

Author: Gert Wollny <[email protected]>
Date:   Fri Jul 21 16:57:59 2023 +0200

r600/sfn: set  block sizes based on chip class

Be conservative with the ALU slots and the VTX slots.

Signed-off-by: Gert Wollny <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>

---

 src/gallium/drivers/r600/sfn/sfn_instr.cpp     | 18 +++++++++++++++---
 src/gallium/drivers/r600/sfn/sfn_instr.h       |  4 ++--
 src/gallium/drivers/r600/sfn/sfn_scheduler.cpp |  3 ++-
 3 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/r600/sfn/sfn_instr.cpp 
b/src/gallium/drivers/r600/sfn/sfn_instr.cpp
index ca726bcba82..f3e2a5f49f9 100644
--- a/src/gallium/drivers/r600/sfn/sfn_instr.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_instr.cpp
@@ -296,15 +296,27 @@ Block::erase(iterator node)
 }
 
 void
-Block::set_type(Type t)
+Block::set_type(Type t, r600_chip_class chip_class)
 {
    m_blocK_type = t;
    switch (t) {
    case vtx:
+      /* In theory on >= EG VTX support 16 slots, but with vertex fetch
+       * instructions the register pressure increases fast - i.e. in the worst
+       * case four register more get used, so stick to 8 slots for now.
+       * TODO: think about some trickery in the schedler to make use of up
+       * to 16 slots if the register pressure doesn't get too high.
+       */
+      m_remaining_slots = 8;
+      break;
    case gds:
    case tex:
-      m_remaining_slots = 8;
-      break; /* TODO: 16 for >= EVERGREEN */
+      m_remaining_slots = chip_class >= ISA_CC_EVERGREEN ? 16 : 8;
+      break;
+   case alu:
+      /* 128 but a follow up block might need to emit and ADDR + INDEX load */
+      m_remaining_slots = 118;
+      break;
    default:
       m_remaining_slots = 0xffff;
    }
diff --git a/src/gallium/drivers/r600/sfn/sfn_instr.h 
b/src/gallium/drivers/r600/sfn/sfn_instr.h
index 3254100e868..4de2777da1b 100644
--- a/src/gallium/drivers/r600/sfn/sfn_instr.h
+++ b/src/gallium/drivers/r600/sfn/sfn_instr.h
@@ -204,8 +204,8 @@ public:
    int id() const { return m_id; }
 
    auto type() const { return m_blocK_type; }
-   void set_type(Type t);
-   uint32_t remaining_slots() const { return m_remaining_slots; }
+   void set_type(Type t, r600_chip_class chip_class);
+   int32_t remaining_slots() const { return m_remaining_slots;}
 
    bool try_reserve_kcache(const AluGroup& instr);
    bool try_reserve_kcache(const AluInstr& group);
diff --git a/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp 
b/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
index 7ae5dca0125..feb2cccc362 100644
--- a/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
@@ -754,8 +754,9 @@ BlockScheduler::start_new_block(Shader::ShaderBlocks& 
out_blocks, Block::Type ty
          new Block(m_current_block->nesting_depth(), m_current_block->id());
       m_current_block->set_instr_flag(Instr::force_cf);
       m_idx0_pending = m_idx1_pending = false;
+
    }
-   m_current_block->set_type(type);
+   m_current_block->set_type(type, m_chip_class);
 }
 
 template <typename I>

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