Module: Mesa Branch: main Commit: b95bb44c61e20f30d646d735764130d73a3727d9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b95bb44c61e20f30d646d735764130d73a3727d9
Author: Iago Toral Quiroga <[email protected]> Date: Mon Jul 31 10:26:55 2023 +0200 broadcom/compiler: always clamp results from logic ops We have also been clamping our integer RTs in GL for a while now. Reviewed-by: Alejandro Piñeiro <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24396> --- src/broadcom/compiler/v3d_nir_lower_logic_ops.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/src/broadcom/compiler/v3d_nir_lower_logic_ops.c b/src/broadcom/compiler/v3d_nir_lower_logic_ops.c index f2b9341a92b..932d94d93bf 100644 --- a/src/broadcom/compiler/v3d_nir_lower_logic_ops.c +++ b/src/broadcom/compiler/v3d_nir_lower_logic_ops.c @@ -236,19 +236,17 @@ v3d_emit_logic_op_raw(struct v3d_compile *c, nir_builder *b, v3d_nir_get_swizzled_channel(b, dst_chans, fmt_swz[i]); op_res[i] = v3d_logicop(b, c->fs_key->logicop_func, src, dst); - /* In Vulkan we configure our integer RTs to clamp, so we need - * to ignore result bits that don't fit in the destination RT - * component size. + /* We configure our integer RTs to clamp, so we need to ignore + * result bits that don't fit in the destination RT component + * size. */ - if (c->key->environment == V3D_ENVIRONMENT_VULKAN) { - uint32_t bits = - util_format_get_component_bits( - c->fs_key->color_fmt[rt].format, - UTIL_FORMAT_COLORSPACE_RGB, i); - if (bits > 0 && bits < 32) { - op_res[i] = nir_iand_imm(b, op_res[i], - (1u << bits) - 1); - } + uint32_t bits = + util_format_get_component_bits( + c->fs_key->color_fmt[rt].format, + UTIL_FORMAT_COLORSPACE_RGB, i); + if (bits > 0 && bits < 32) { + op_res[i] = + nir_iand_imm(b, op_res[i], (1u << bits) - 1); } }
