Module: Mesa Branch: main Commit: 0e5b4b1b437423751639dec865daf3dcbfb11233 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e5b4b1b437423751639dec865daf3dcbfb11233
Author: Lionel Landwerlin <[email protected]> Date: Mon Jul 3 17:46:41 2023 +0300 hasvk: fix null descriptor handling with A64 messages This replicates the same fix we did for Anv and null descriptors with A64 messages from commit efcda1c530 ("anv: fix null descriptor handling with A64 messages"). Signed-off-by: Lionel Landwerlin <[email protected]> Cc: mesa-stable Reviewed-by: Ivan Briano <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545> --- src/intel/vulkan_hasvk/anv_device.c | 4 ++++ src/intel/vulkan_hasvk/anv_pipeline.c | 24 ++++++++++++------------ src/intel/vulkan_hasvk/anv_private.h | 2 ++ 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c index f0263470fc6..000878e8887 100644 --- a/src/intel/vulkan_hasvk/anv_device.c +++ b/src/intel/vulkan_hasvk/anv_device.c @@ -2977,6 +2977,10 @@ VkResult anv_CreateDevice( goto fail_default_pipeline_cache; } + device->robust_buffer_access = + device->vk.enabled_features.robustBufferAccess || + device->vk.enabled_features.nullDescriptor; + anv_device_init_blorp(device); anv_device_init_border_colors(device); diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 6277e8ff95a..9b9027a99c3 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -112,9 +112,9 @@ anv_shader_stage_to_nir(struct anv_device *device, .workgroup_memory_explicit_layout = true, }, .ubo_addr_format = - anv_nir_ubo_addr_format(pdevice, device->vk.enabled_features.robustBufferAccess), + anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access), .ssbo_addr_format = - anv_nir_ssbo_addr_format(pdevice, device->vk.enabled_features.robustBufferAccess), + anv_nir_ssbo_addr_format(pdevice, device->robust_buffer_access), .phys_ssbo_addr_format = nir_address_format_64bit_global, .push_const_addr_format = nir_address_format_logical, @@ -575,15 +575,15 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, /* Apply the actual pipeline layout to UBOs, SSBOs, and textures */ NIR_PASS_V(nir, anv_nir_apply_pipeline_layout, - pdevice, pipeline->device->vk.enabled_features.robustBufferAccess, + pdevice, pipeline->device->robust_buffer_access, layout, &stage->bind_map); NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ubo, anv_nir_ubo_addr_format(pdevice, - pipeline->device->vk.enabled_features.robustBufferAccess)); + pipeline->device->robust_buffer_access)); NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ssbo, anv_nir_ssbo_addr_format(pdevice, - pipeline->device->vk.enabled_features.robustBufferAccess)); + pipeline->device->robust_buffer_access)); /* First run copy-prop to get rid of all of the vec() that address * calculations often create and then constant-fold so that, when we @@ -616,7 +616,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, } NIR_PASS_V(nir, anv_nir_compute_push_layout, - pdevice, pipeline->device->vk.enabled_features.robustBufferAccess, + pdevice, pipeline->device->robust_buffer_access, prog_data, &stage->bind_map, mem_ctx); if (gl_shader_stage_uses_workgroup(nir->info.stage)) { @@ -1110,28 +1110,28 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline, switch (stages[s].stage) { case MESA_SHADER_VERTEX: populate_vs_prog_key(device, - pipeline->base.device->vk.enabled_features.robustBufferAccess, + pipeline->base.device->robust_buffer_access, &stages[s].key.vs); break; case MESA_SHADER_TESS_CTRL: populate_tcs_prog_key(device, - pipeline->base.device->vk.enabled_features.robustBufferAccess, + pipeline->base.device->robust_buffer_access, state->ts->patch_control_points, &stages[s].key.tcs); break; case MESA_SHADER_TESS_EVAL: populate_tes_prog_key(device, - pipeline->base.device->vk.enabled_features.robustBufferAccess, + pipeline->base.device->robust_buffer_access, &stages[s].key.tes); break; case MESA_SHADER_GEOMETRY: populate_gs_prog_key(device, - pipeline->base.device->vk.enabled_features.robustBufferAccess, + pipeline->base.device->robust_buffer_access, &stages[s].key.gs); break; case MESA_SHADER_FRAGMENT: { populate_wm_prog_key(pipeline, - pipeline->base.device->vk.enabled_features.robustBufferAccess, + pipeline->base.device->robust_buffer_access, state->dynamic, state->ms, state->rp, &stages[s].key.wm); break; @@ -1510,7 +1510,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, struct anv_shader_bin *bin = NULL; - populate_cs_prog_key(device, device->vk.enabled_features.robustBufferAccess, &stage.key.cs); + populate_cs_prog_key(device, device->robust_buffer_access, &stage.key.cs); ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout); diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h index 9819f66934d..d514da1c083 100644 --- a/src/intel/vulkan_hasvk/anv_private.h +++ b/src/intel/vulkan_hasvk/anv_private.h @@ -1077,6 +1077,8 @@ struct anv_device { struct anv_scratch_pool scratch_pool; + bool robust_buffer_access; + pthread_mutex_t mutex; pthread_cond_t queue_submit;
