Module: Mesa Branch: main Commit: 0228b294e8b9c341588e8338106ec17e4da7dce3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0228b294e8b9c341588e8338106ec17e4da7dce3
Author: Tatsuyuki Ishi <ishitatsuy...@gmail.com> Date: Tue Sep 5 23:55:48 2023 +0900 radv: Fix IB size for RADV_DEBUG=hang. cs->base.cdw here is the size of the last CS in the chain, but we are passing in the first CS in the chain to begin decoding. Hence, cs->ib_buffers[0].cdw is the correct size here. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25061> --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index 59fc9a32088..24a4a7b835d 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c @@ -1353,14 +1353,13 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra { struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs; struct radv_amdgpu_winsys *ws = cs->ws; - int num_dw = cs->base.cdw; if (cs->use_ib) { struct radv_amdgpu_cs_ib_info ib_info = radv_amdgpu_cs_ib_to_info(cs, cs->ib_buffers[0]); void *ib = radv_amdgpu_winsys_get_cpu_addr(cs, ib_info.ib_mc_address); assert(ib); - ac_parse_ib(file, ib, num_dw, trace_ids, trace_id_count, "main IB", ws->info.gfx_level, ws->info.family, - radv_amdgpu_winsys_get_cpu_addr, cs); + ac_parse_ib(file, ib, cs->ib_buffers[0].cdw, trace_ids, trace_id_count, "main IB", ws->info.gfx_level, + ws->info.family, radv_amdgpu_winsys_get_cpu_addr, cs); } else { for (unsigned i = 0; i < cs->num_ib_buffers; i++) { struct radv_amdgpu_ib *ib = &cs->ib_buffers[i];
