Module: Mesa Branch: main Commit: 5754461f0591e7aff11e6513bb6117056142c952 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5754461f0591e7aff11e6513bb6117056142c952
Author: Kenneth Graunke <[email protected]> Date: Fri Sep 8 16:17:30 2023 -0700 dxil: Set UAV_FENCE_THREAD_GROUP any time global isn't required With the new nir_opt_barrier_modes() pass, we may encounter control barriers with no memory modes set, such as: @barrier () (execution_scope=WORKGROUP, memory_scope=WORKGROUP, mem_semantics=ACQ|REL, mem_modes=0) The DXIL validator documentation [1] mentions an INSTR.BARRIERMODENOMEMORY validation rule: "sync must include some form of memory barrier - _u (UAV) and/or _g (Thread Group Shared Memory). Only _t (thread group sync) is optional." We were generating a dx.op.barrier instruction with only one flag, DXIL_BARRIER_MODE_SYNC_THREAD_GROUP. This seems to run afoul of the above validator rule. So, this patch adjusts the code generator to set DXIL_BARRIER_MODE_UAV_FENCE_THREAD_GROUP too, whenever UAV_FENCE_GLOBAL isn't required. [1] https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24842> --- src/microsoft/compiler/nir_to_dxil.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/microsoft/compiler/nir_to_dxil.c b/src/microsoft/compiler/nir_to_dxil.c index 36a04d86d44..d173c60b29f 100644 --- a/src/microsoft/compiler/nir_to_dxil.c +++ b/src/microsoft/compiler/nir_to_dxil.c @@ -3078,11 +3078,11 @@ emit_barrier_impl(struct ntd_context *ctx, nir_variable_mode modes, mesa_scope e bool is_compute = ctx->mod.shader_kind == DXIL_COMPUTE_SHADER; - if (modes & (nir_var_mem_ssbo | nir_var_mem_global | nir_var_image)) { - if (mem_scope > SCOPE_WORKGROUP || !is_compute) - flags |= DXIL_BARRIER_MODE_UAV_FENCE_GLOBAL; - else - flags |= DXIL_BARRIER_MODE_UAV_FENCE_THREAD_GROUP; + if ((modes & (nir_var_mem_ssbo | nir_var_mem_global | nir_var_image)) && + (mem_scope > SCOPE_WORKGROUP || !is_compute)) { + flags |= DXIL_BARRIER_MODE_UAV_FENCE_GLOBAL; + } else { + flags |= DXIL_BARRIER_MODE_UAV_FENCE_THREAD_GROUP; } if ((modes & nir_var_mem_shared) && is_compute)
