Module: Mesa Branch: main Commit: aca2adc36c33c1280c732e9bc56666a7bbbad9c3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aca2adc36c33c1280c732e9bc56666a7bbbad9c3
Author: Samuel Pitoiset <[email protected]> Date: Tue Sep 12 10:32:26 2023 +0200 ac/spm: add SPM counters configuration for GFX11 All SQ counters changed to SQ_WGP and the L2 miss changed too. Sourced from PAL. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25175> --- src/amd/common/ac_spm.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/src/amd/common/ac_spm.c b/src/amd/common/ac_spm.c index 7d3c73a21c5..f940a1f4a06 100644 --- a/src/amd/common/ac_spm.c +++ b/src/amd/common/ac_spm.c @@ -58,6 +58,30 @@ static struct ac_spm_counter_create_info gfx103_spm_counters[] = { {&gfx103_num_gl2c_misses}, }; +/* GFX11+ */ +static struct ac_spm_counter_descr gfx11_num_l2_misses = {TCP, 0, 0x11}; +static struct ac_spm_counter_descr gfx11_num_scache_hits = {SQ_WGP, 0, 0x126}; +static struct ac_spm_counter_descr gfx11_num_scache_misses = {SQ_WGP, 0, 0x127}; +static struct ac_spm_counter_descr gfx11_num_scache_misses_dup = {SQ_WGP, 0, 0x128}; +static struct ac_spm_counter_descr gfx11_num_icache_hits = {SQ_WGP, 0, 0x10e}; +static struct ac_spm_counter_descr gfx11_num_icache_misses = {SQ_WGP, 0, 0x10f}; +static struct ac_spm_counter_descr gfx11_num_icache_misses_dup = {SQ_WGP, 0, 0x110}; + +static struct ac_spm_counter_create_info gfx11_spm_counters[] = { + {&gfx10_num_l2_hits}, + {&gfx11_num_l2_misses}, + {&gfx11_num_scache_hits}, + {&gfx11_num_scache_misses}, + {&gfx11_num_scache_misses_dup}, + {&gfx11_num_icache_hits}, + {&gfx11_num_icache_misses}, + {&gfx11_num_icache_misses_dup}, + {&gfx10_num_gl1c_hits}, + {&gfx10_num_gl1c_misses}, + {&gfx10_num_gl2c_hits}, + {&gfx103_num_gl2c_misses}, +}; + static struct ac_spm_counter_create_info * ac_spm_get_counters(const struct radeon_info *info, unsigned *num_counters) { @@ -68,6 +92,9 @@ ac_spm_get_counters(const struct radeon_info *info, unsigned *num_counters) case GFX10_3: *num_counters = ARRAY_SIZE(gfx103_spm_counters); return gfx103_spm_counters; + case GFX11: + *num_counters = ARRAY_SIZE(gfx11_spm_counters); + return gfx11_spm_counters; default: unreachable("invalid gfx_level for SPM counters"); }
