Module: Mesa Branch: main Commit: fae4360a08b28ce2cc58eb4c7202b8c07f7d7a7e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fae4360a08b28ce2cc58eb4c7202b8c07f7d7a7e
Author: Samuel Pitoiset <[email protected]> Date: Wed Sep 20 16:45:04 2023 +0200 radv: enable lowering of mesh/task shader queries when enabled Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25331> --- src/amd/vulkan/nir/radv_nir_lower_io.c | 2 +- src/amd/vulkan/radv_device.c | 8 ++++++++ src/amd/vulkan/radv_pipeline_graphics.c | 2 ++ src/amd/vulkan/radv_private.h | 3 +++ src/amd/vulkan/radv_shader.c | 2 +- src/amd/vulkan/radv_shader.h | 3 +++ src/amd/vulkan/radv_shader_info.c | 14 ++++++++++---- 7 files changed, 28 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c index 4b555a6c819..bc5ecfe41e9 100644 --- a/src/amd/vulkan/nir/radv_nir_lower_io.c +++ b/src/amd/vulkan/nir/radv_nir_lower_io.c @@ -173,7 +173,7 @@ radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *s return true; } else if (nir->info.stage == MESA_SHADER_TASK) { ac_nir_lower_task_outputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES, device->physical_device->task_info.num_entries, - false); + info->cs.has_query); return true; } else if (nir->info.stage == MESA_SHADER_MESH) { ac_nir_lower_mesh_inputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES, device->physical_device->task_info.num_entries); diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 947bb038f92..4fdfa2f2582 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -690,6 +690,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr bool use_perf_counters = false; bool use_dgc = false; bool smooth_lines = false; + bool mesh_shader_queries = false; /* Check enabled features */ if (pCreateInfo->pEnabledFeatures) { @@ -801,6 +802,12 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr smooth_lines = true; break; } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MESH_SHADER_FEATURES_EXT: { + const VkPhysicalDeviceMeshShaderFeaturesEXT *features = (const void *)ext; + if (features->meshShaderQueries) + mesh_shader_queries = true; + break; + } default: break; } @@ -857,6 +864,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr device->primitives_generated_query = primitives_generated_query; device->uses_device_generated_commands = use_dgc; device->smooth_lines = smooth_lines; + device->mesh_shader_queries = mesh_shader_queries; radv_init_shader_arenas(device); diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 0aa8ba714a0..d0f3f362b05 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1993,6 +1993,8 @@ radv_generate_graphics_pipeline_key(const struct radv_device *device, const stru } } + key.mesh_shader_queries = device->mesh_shader_queries; + return key; } diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 6266fe37877..fb4f6e97850 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1116,6 +1116,9 @@ struct radv_device { /* Whether smooth lines is enabled. */ bool smooth_lines; + /* Whether mesh shader queries are enabled. */ + bool mesh_shader_queries; + bool uses_shadow_regs; struct hash_table *rt_handles; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 4d718652425..7636a66181f 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -912,7 +912,7 @@ radv_lower_ngg(struct radv_device *device, struct radv_shader_stage *ngg_stage, bool scratch_ring = false; NIR_PASS_V(nir, ac_nir_lower_ngg_ms, options.gfx_level, options.clipdist_enable_mask, options.vs_output_param_offset, options.has_param_exports, &scratch_ring, info->wave_size, - pl_key->has_multiview_view_index, false); + pl_key->has_multiview_view_index, info->ms.has_query); ngg_stage->info.ms.needs_ms_scratch_ring = scratch_ring; } else { unreachable("invalid SW stage passed to radv_lower_ngg"); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index edf2c294732..f902d3e1e94 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -96,6 +96,7 @@ struct radv_pipeline_key { uint32_t tex_non_uniform : 1; uint32_t enable_remove_point_size : 1; uint32_t unknown_rast_prim : 1; + uint32_t mesh_shader_queries : 1; uint32_t vertex_robustness1 : 1; @@ -428,6 +429,7 @@ struct radv_shader_info { bool uses_rt; bool uses_full_subgroups; bool linear_taskmesh_dispatch; + bool has_query; /* Task shader only */ bool regalloc_hang_bug; } cs; @@ -445,6 +447,7 @@ struct radv_shader_info { enum mesa_prim output_prim; bool needs_ms_scratch_ring; bool has_task; /* If mesh shader is used together with a task shader. */ + bool has_query; } ms; struct radv_streamout_info so; diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 2c54d0bd221..4a3e250d91f 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -683,7 +683,8 @@ gather_shader_info_gs(struct radv_device *device, const nir_shader *nir, struct } static void -gather_shader_info_mesh(const nir_shader *nir, struct radv_shader_info *info) +gather_shader_info_mesh(const nir_shader *nir, const struct radv_pipeline_key *pipeline_key, + struct radv_shader_info *info) { struct gfx10_ngg_info *ngg_info = &info->ngg_info; @@ -729,6 +730,8 @@ gather_shader_info_mesh(const nir_shader *nir, struct radv_shader_info *info) unsigned api_workgroup_size = ac_compute_cs_workgroup_size(nir->info.workgroup_size, false, UINT32_MAX); info->workgroup_size = MAX2(min_ngg_workgroup_size, api_workgroup_size); + + info->ms.has_query = pipeline_key->mesh_shader_queries; } static void @@ -933,7 +936,8 @@ gather_shader_info_cs(struct radv_device *device, const nir_shader *nir, const s } static void -gather_shader_info_task(const nir_shader *nir, struct radv_shader_info *info) +gather_shader_info_task(const nir_shader *nir, const struct radv_pipeline_key *pipeline_key, + struct radv_shader_info *info) { /* Task shaders always need these for the I/O lowering even if the API shader doesn't actually * use them. @@ -953,6 +957,8 @@ gather_shader_info_task(const nir_shader *nir, struct radv_shader_info *info) */ info->cs.linear_taskmesh_dispatch = nir->info.mesh.ts_mesh_dispatch_dimensions[1] == 1 && nir->info.mesh.ts_mesh_dispatch_dimensions[2] == 1; + + info->cs.has_query = pipeline_key->mesh_shader_queries; } static uint32_t @@ -1169,7 +1175,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n gather_shader_info_cs(device, nir, pipeline_key, info); break; case MESA_SHADER_TASK: - gather_shader_info_task(nir, info); + gather_shader_info_task(nir, pipeline_key, info); break; case MESA_SHADER_FRAGMENT: gather_shader_info_fs(device, nir, pipeline_key, info); @@ -1187,7 +1193,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n gather_shader_info_vs(device, nir, pipeline_key, info); break; case MESA_SHADER_MESH: - gather_shader_info_mesh(nir, info); + gather_shader_info_mesh(nir, pipeline_key, info); break; default: if (gl_shader_stage_is_rt(nir->info.stage))
