Module: Mesa Branch: main Commit: a43ee1ca5007b38c452ae98fb9f4ce18aa48fefa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a43ee1ca5007b38c452ae98fb9f4ce18aa48fefa
Author: Vitaliy Triang3l Kuzmin <[email protected]> Date: Sat Aug 5 16:53:36 2023 +0300 r600: Replace R600_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN In particular, removes the dependency of r600_formats.h on r600_pipe.h so it can be shared between Gallium and Vulkan. Reviewed-by: Gert Wollny <[email protected]> Signed-off-by: Vitaliy Triang3l Kuzmin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24513> --- src/gallium/drivers/r600/evergreen_state.c | 5 +++-- src/gallium/drivers/r600/r600_asm.c | 3 ++- src/gallium/drivers/r600/r600_formats.h | 4 ++-- src/gallium/drivers/r600/r600_pipe.c | 3 ++- src/gallium/drivers/r600/r600_pipe_common.h | 6 ------ src/gallium/drivers/r600/r600_shader.c | 3 ++- src/gallium/drivers/r600/r600_state.c | 5 +++-- src/gallium/drivers/r600/r600_state_common.c | 11 ++++++----- 8 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 96615300421..1699add4252 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -26,6 +26,7 @@ #include "evergreend.h" #include "pipe/p_shader_tokens.h" +#include "util/u_endian.h" #include "util/u_pack_color.h" #include "util/u_memory.h" #include "util/u_framebuffer.h" @@ -784,7 +785,7 @@ static int evergreen_fill_tex_resource_words(struct r600_context *rctx, } } - if (R600_BIG_ENDIAN) + if (UTIL_ARCH_BIG_ENDIAN) do_endian_swap = !tmp->db_compatible; format = r600_translate_texformat(rctx->b.b.screen, params->pipe_format, @@ -1229,7 +1230,7 @@ static void evergreen_set_color_surface_common(struct r600_context *rctx, ntype = V_028C70_NUMBER_FLOAT; } - if (R600_BIG_ENDIAN) + if (UTIL_ARCH_BIG_ENDIAN) do_endian_swap = !rtex->db_compatible; format = r600_translate_colorformat(rctx->b.gfx_level, pformat, do_endian_swap); diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index ceb38f2f708..dea3bc91b3e 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -29,6 +29,7 @@ #include <errno.h> #include "util/u_bitcast.h" #include "util/u_dump.h" +#include "util/u_endian.h" #include "util/u_memory.h" #include "util/u_math.h" #include "pipe/p_shader_tokens.h" @@ -2952,7 +2953,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, PIPE_MAP_WRITE | PIPE_MAP_UNSYNCHRONIZED | RADEON_MAP_TEMPORARY); bytecode += shader->offset / 4; - if (R600_BIG_ENDIAN) { + if (UTIL_ARCH_BIG_ENDIAN) { for (i = 0; i < fs_size / 4; ++i) { bytecode[i] = util_cpu_to_le32(bc.bytecode[i]); } diff --git a/src/gallium/drivers/r600/r600_formats.h b/src/gallium/drivers/r600/r600_formats.h index aee87183cb7..f36e5534f29 100644 --- a/src/gallium/drivers/r600/r600_formats.h +++ b/src/gallium/drivers/r600/r600_formats.h @@ -2,7 +2,7 @@ #define R600_FORMATS_H #include "util/format/u_format.h" -#include "r600_pipe.h" +#include "util/u_endian.h" /* list of formats from R700 ISA document - apply across GPUs in different registers */ #define FMT_INVALID 0x00000000 @@ -66,7 +66,7 @@ static inline unsigned r600_endian_swap(unsigned size) { - if (R600_BIG_ENDIAN) { + if (UTIL_ARCH_BIG_ENDIAN) { switch (size) { case 64: return ENDIAN_8IN64; diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index cb884e5353b..caea8f509d5 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -29,6 +29,7 @@ #include <errno.h> #include "pipe/p_shader_tokens.h" #include "util/u_debug.h" +#include "util/u_endian.h" #include "util/u_memory.h" #include "util/u_screen.h" #include "util/u_simple_shaders.h" @@ -324,7 +325,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param) return 1; case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: - return !R600_BIG_ENDIAN && rscreen->b.info.has_userptr; + return !UTIL_ARCH_BIG_ENDIAN && rscreen->b.info.has_userptr; case PIPE_CAP_COMPUTE: return rscreen->b.gfx_level > R700; diff --git a/src/gallium/drivers/r600/r600_pipe_common.h b/src/gallium/drivers/r600/r600_pipe_common.h index 1d2227f5d30..7d07c3db029 100644 --- a/src/gallium/drivers/r600/r600_pipe_common.h +++ b/src/gallium/drivers/r600/r600_pipe_common.h @@ -113,12 +113,6 @@ enum r600_coherency { R600_COHERENCY_CB_META, }; -#if UTIL_ARCH_BIG_ENDIAN -#define R600_BIG_ENDIAN 1 -#else -#define R600_BIG_ENDIAN 0 -#endif - struct r600_common_context; struct r600_perfcounters; struct tgsi_shader_info; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index c77e0324807..44d6506b573 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -41,6 +41,7 @@ #include "nir/nir_to_tgsi_info.h" #include "compiler/nir/nir.h" #include "util/u_bitcast.h" +#include "util/u_endian.h" #include "util/u_memory.h" #include "util/u_math.h" #include <stdio.h> @@ -127,7 +128,7 @@ static int store_shader(struct pipe_context *ctx, ptr = r600_buffer_map_sync_with_rings( &rctx->b, shader->bo, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY); - if (R600_BIG_ENDIAN) { + if (UTIL_ARCH_BIG_ENDIAN) { for (i = 0; i < shader->shader.bc.ndw; ++i) { ptr[i] = util_cpu_to_le32(shader->shader.bc.bytecode[i]); } diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index cef61dfbc1a..dd1533905cd 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -25,6 +25,7 @@ #include "r600d.h" #include "pipe/p_shader_tokens.h" +#include "util/u_endian.h" #include "util/u_pack_color.h" #include "util/u_memory.h" #include "util/u_framebuffer.h" @@ -698,7 +699,7 @@ r600_create_sampler_view_custom(struct pipe_context *ctx, swizzle[2] = state->swizzle_b; swizzle[3] = state->swizzle_a; - if (R600_BIG_ENDIAN) + if (UTIL_ARCH_BIG_ENDIAN) do_endian_swap = !tmp->db_compatible; format = r600_translate_texformat(ctx->screen, state->format, @@ -876,7 +877,7 @@ static void r600_init_color_surface(struct r600_context *rctx, ntype = V_0280A0_NUMBER_FLOAT; } - if (R600_BIG_ENDIAN) + if (UTIL_ARCH_BIG_ENDIAN) do_endian_swap = !rtex->db_compatible; format = r600_translate_colorformat(rctx->b.gfx_level, surf->base.format, diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index dab51a5e27d..d7956e51c94 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -30,6 +30,7 @@ #include "util/format/u_format_s3tc.h" #include "util/u_draw.h" +#include "util/u_endian.h" #include "util/u_index_modify.h" #include "util/u_memory.h" #include "util/u_upload_mgr.h" @@ -1298,7 +1299,7 @@ static void r600_set_constant_buffer(struct pipe_context *ctx, if (ptr) { /* Upload the user buffer. */ - if (R600_BIG_ENDIAN) { + if (UTIL_ARCH_BIG_ENDIAN) { uint32_t *tmpPtr; unsigned i, size = input->buffer_size; @@ -2287,7 +2288,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info * and the indices are emitted via PKT3_DRAW_INDEX_IMMD. * Indirect draws never use immediate indices. * Note: Instanced rendering in combination with immediate indices hangs. */ - if (has_user_indices && (R600_BIG_ENDIAN || indirect || + if (has_user_indices && (UTIL_ARCH_BIG_ENDIAN || indirect || info->instance_count > 1 || draws[0].count*index_size > 20)) { unsigned start_offset = draws[0].start * index_size; @@ -2439,8 +2440,8 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info if (index_size) { radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); radeon_emit(cs, index_size == 4 ? - (VGT_INDEX_32 | (R600_BIG_ENDIAN ? VGT_DMA_SWAP_32_BIT : 0)) : - (VGT_INDEX_16 | (R600_BIG_ENDIAN ? VGT_DMA_SWAP_16_BIT : 0))); + (VGT_INDEX_32 | (UTIL_ARCH_BIG_ENDIAN ? VGT_DMA_SWAP_32_BIT : 0)) : + (VGT_INDEX_16 | (UTIL_ARCH_BIG_ENDIAN ? VGT_DMA_SWAP_16_BIT : 0))); if (has_user_indices) { unsigned size_bytes = draws[0].count*index_size; @@ -3262,7 +3263,7 @@ uint32_t r600_translate_colorformat(enum amd_gfx_level chip, enum pipe_format fo uint32_t r600_colorformat_endian_swap(uint32_t colorformat, bool do_endian_swap) { - if (R600_BIG_ENDIAN) { + if (UTIL_ARCH_BIG_ENDIAN) { switch(colorformat) { /* 8-bit buffers. */ case V_0280A0_COLOR_4_4:
