Module: Mesa
Branch: staging/23.2
Commit: 7136f44d676e9e939f620ee583a75a2eddd33393
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7136f44d676e9e939f620ee583a75a2eddd33393

Author: wangra <[email protected]>
Date:   Wed Sep 27 13:11:00 2023 -0400

tu/kgsl: Fix bitfield of DITHER_MODE_MRT6

The enum `adreno_rb_dither_mode` needs 2 bits, change the `high` to 13 to make 
sure 2 bits are used for `DITHER_MODE_MRT6`

Fixes: e03259974e2f2c8e8c0295f8dab56d88e7bd896c ("freedreno: Generate headers 
from xml files")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25439>
(cherry picked from commit e90f9d8e212535fbd44bb4088fb0e8078d9f2935)

---

 .pick_status.json                       | 2 +-
 src/freedreno/registers/adreno/a6xx.xml | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 85f474b59ec..6bb85a58595 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -3184,7 +3184,7 @@
         "description": "tu/kgsl: Fix bitfield of DITHER_MODE_MRT6",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "e03259974e2f2c8e8c0295f8dab56d88e7bd896c",
         "notes": ""
diff --git a/src/freedreno/registers/adreno/a6xx.xml 
b/src/freedreno/registers/adreno/a6xx.xml
index f5f4edc08c8..769e0e2f6c6 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -2281,7 +2281,7 @@ to upconvert to 32b float internally?
                <bitfield name="DITHER_MODE_MRT3" low="6"  high="7"  
type="adreno_rb_dither_mode"/>
                <bitfield name="DITHER_MODE_MRT4" low="8"  high="9"  
type="adreno_rb_dither_mode"/>
                <bitfield name="DITHER_MODE_MRT5" low="10" high="11" 
type="adreno_rb_dither_mode"/>
-               <bitfield name="DITHER_MODE_MRT6" low="12" high="12" 
type="adreno_rb_dither_mode"/>
+               <bitfield name="DITHER_MODE_MRT6" low="12" high="13" 
type="adreno_rb_dither_mode"/>
                <bitfield name="DITHER_MODE_MRT7" low="14" high="15" 
type="adreno_rb_dither_mode"/>
        </reg32>
        <reg32 offset="0x880f" name="RB_SRGB_CNTL" usage="rp_blit">

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