Module: Mesa
Branch: main
Commit: b442de86c1e184839d6c8d5933b3cec7ceadd53e
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b442de86c1e184839d6c8d5933b3cec7ceadd53e

Author: Timur Kristóf <[email protected]>
Date:   Fri Oct 20 22:12:43 2023 +0200

radv: Support SDMA in radv_cp_wait_mem.

Signed-off-by: Timur Kristóf <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Tatsuyuki Ishi <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>

---

 src/amd/common/sid.h     |  1 +
 src/amd/vulkan/radv_cs.h | 28 +++++++++++++++++++---------
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index dff4eb1d338..e3eb2f8f9cd 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -343,6 +343,7 @@
 #define CIK_SDMA_OPCODE_TRAP                       0x6
 #define CIK_SDMA_OPCODE_SEMAPHORE                  0x7
 #define CIK_SDMA_OPCODE_POLL_REGMEM                0x8
+#define SDMA_POLL_MEM                              (1 << 31)
 #define SDMA_POLL_INTERVAL_160_CLK                 0xa
 #define SDMA_POLL_RETRY_INDEFINITELY               0xfff
 #define CIK_SDMA_OPCODE_CONSTANT_FILL              0xb
diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h
index d40a2cfd010..d8f525713ae 100644
--- a/src/amd/vulkan/radv_cs.h
+++ b/src/amd/vulkan/radv_cs.h
@@ -213,15 +213,25 @@ radv_cp_wait_mem(struct radeon_cmdbuf *cs, const enum 
radv_queue_family qf, cons
                  const uint32_t ref, const uint32_t mask)
 {
    assert(op == WAIT_REG_MEM_EQUAL || op == WAIT_REG_MEM_NOT_EQUAL || op == 
WAIT_REG_MEM_GREATER_OR_EQUAL);
-   assert(qf == RADV_QUEUE_GENERAL || qf == RADV_QUEUE_COMPUTE);
-
-   radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, false));
-   radeon_emit(cs, op | WAIT_REG_MEM_MEM_SPACE(1));
-   radeon_emit(cs, va);
-   radeon_emit(cs, va >> 32);
-   radeon_emit(cs, ref);  /* reference value */
-   radeon_emit(cs, mask); /* mask */
-   radeon_emit(cs, 4);    /* poll interval */
+
+   if (qf == RADV_QUEUE_GENERAL || qf == RADV_QUEUE_COMPUTE) {
+      radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, false));
+      radeon_emit(cs, op | WAIT_REG_MEM_MEM_SPACE(1));
+      radeon_emit(cs, va);
+      radeon_emit(cs, va >> 32);
+      radeon_emit(cs, ref);  /* reference value */
+      radeon_emit(cs, mask); /* mask */
+      radeon_emit(cs, 4);    /* poll interval */
+   } else if (qf == RADV_QUEUE_TRANSFER) {
+      radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_POLL_REGMEM, 0, 0) | op 
<< 28 | SDMA_POLL_MEM);
+      radeon_emit(cs, va);
+      radeon_emit(cs, va >> 32);
+      radeon_emit(cs, ref);
+      radeon_emit(cs, mask);
+      radeon_emit(cs, SDMA_POLL_INTERVAL_160_CLK | 
SDMA_POLL_RETRY_INDEFINITELY << 16);
+   } else {
+      unreachable("unsupported queue family");
+   }
 }
 
 ALWAYS_INLINE static unsigned

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