Module: Mesa Branch: main Commit: 736577871b939573af400e4e64ebfe18863d49af URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=736577871b939573af400e4e64ebfe18863d49af
Author: Mike Blumenkrantz <michael.blumenkra...@gmail.com> Date: Thu Oct 26 11:34:26 2023 -0400 zink: check for cbuf0 writes before setting A2C VUID-vkCmdDrawMultiIndexedEXT-alphaToCoverageEnable-08919 requires a cbuf0 write for A2C to be active cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25938> --- src/gallium/drivers/zink/zink_draw.cpp | 3 ++- src/gallium/drivers/zink/zink_program.c | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/zink/zink_draw.cpp b/src/gallium/drivers/zink/zink_draw.cpp index 11e7295fe82..0eee77f1d72 100644 --- a/src/gallium/drivers/zink/zink_draw.cpp +++ b/src/gallium/drivers/zink/zink_draw.cpp @@ -819,7 +819,8 @@ zink_draw(struct pipe_context *pctx, if ((BATCH_CHANGED || ctx->blend_state_changed)) { if (ctx->gfx_pipeline_state.blend_state) { if (ctx->ds3_states & BITFIELD_BIT(ZINK_DS3_BLEND_A2C)) - VKCTX(CmdSetAlphaToCoverageEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->alpha_to_coverage); + VKCTX(CmdSetAlphaToCoverageEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->alpha_to_coverage && + ctx->gfx_stages[MESA_SHADER_FRAGMENT]->info.outputs_written & BITFIELD_BIT(FRAG_RESULT_DATA0)); if (ctx->ds3_states & BITFIELD_BIT(ZINK_DS3_BLEND_A21)) VKCTX(CmdSetAlphaToOneEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->alpha_to_one); if (ctx->fb_state.nr_cbufs) { diff --git a/src/gallium/drivers/zink/zink_program.c b/src/gallium/drivers/zink/zink_program.c index 024e19088e8..c82607272d5 100644 --- a/src/gallium/drivers/zink/zink_program.c +++ b/src/gallium/drivers/zink/zink_program.c @@ -1864,11 +1864,17 @@ zink_bind_fs_state(struct pipe_context *pctx, zink_set_null_fs(ctx); return; } + bool writes_cbuf0 = ctx->gfx_stages[MESA_SHADER_FRAGMENT] ? (ctx->gfx_stages[MESA_SHADER_FRAGMENT]->info.outputs_written & BITFIELD_BIT(FRAG_RESULT_DATA0)) > 0 : true; unsigned shadow_mask = ctx->gfx_stages[MESA_SHADER_FRAGMENT] ? ctx->gfx_stages[MESA_SHADER_FRAGMENT]->fs.legacy_shadow_mask : 0; bind_gfx_stage(ctx, MESA_SHADER_FRAGMENT, cso); ctx->fbfetch_outputs = 0; if (cso) { shader_info *info = &ctx->gfx_stages[MESA_SHADER_FRAGMENT]->info; + bool new_writes_cbuf0 = (info->outputs_written & BITFIELD_BIT(FRAG_RESULT_DATA0)) > 0; + if (ctx->gfx_pipeline_state.blend_state && ctx->gfx_pipeline_state.blend_state->alpha_to_coverage && writes_cbuf0 != new_writes_cbuf0) { + ctx->blend_state_changed = true; + ctx->ds3_states |= BITFIELD_BIT(ZINK_DS3_BLEND_A2C); + } if (info->fs.uses_fbfetch_output) { if (info->outputs_read & (BITFIELD_BIT(FRAG_RESULT_DEPTH) | BITFIELD_BIT(FRAG_RESULT_STENCIL))) ctx->fbfetch_outputs |= BITFIELD_BIT(PIPE_MAX_COLOR_BUFS);
