Module: Mesa Branch: main Commit: 694d64188bae3634ea1162773679035874285392 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=694d64188bae3634ea1162773679035874285392
Author: Francisco Jerez <curroje...@riseup.net> Date: Tue Oct 17 18:06:34 2023 -0700 intel/xehp+: Define driconf option for selectively disabling TBIMR. This may help debugging performance problems in the possible case that TBIMR negatively impacts the performance of some application. It could also allow applying application-specific band-aid fixes in the XML file until a more general workaround is implemented. Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493> --- src/gallium/drivers/iris/driinfo_iris.h | 1 + src/gallium/drivers/iris/iris_blorp.c | 1 + src/gallium/drivers/iris/iris_screen.c | 2 ++ src/gallium/drivers/iris/iris_screen.h | 1 + src/intel/blorp/blorp.h | 2 ++ src/intel/vulkan/anv_blorp.c | 1 + src/intel/vulkan/anv_device.c | 2 ++ src/intel/vulkan/anv_private.h | 2 ++ 8 files changed, 12 insertions(+) diff --git a/src/gallium/drivers/iris/driinfo_iris.h b/src/gallium/drivers/iris/driinfo_iris.h index dd67f2d79b7..2ebb9aaa7c9 100644 --- a/src/gallium/drivers/iris/driinfo_iris.h +++ b/src/gallium/drivers/iris/driinfo_iris.h @@ -12,6 +12,7 @@ DRI_CONF_SECTION_END DRI_CONF_SECTION_PERFORMANCE DRI_CONF_ADAPTIVE_SYNC(true) DRI_CONF_OPT_E(bo_reuse, 1, 0, 1, "Buffer object reuse",) + DRI_CONF_OPT_B(intel_tbimr, false, "Enable TBIMR tiled rendering") DRI_CONF_SECTION_END DRI_CONF_SECTION_QUALITY diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c index 02deebd89eb..99f9067e1ee 100644 --- a/src/gallium/drivers/iris/iris_blorp.c +++ b/src/gallium/drivers/iris/iris_blorp.c @@ -498,6 +498,7 @@ genX(init_blorp)(struct iris_context *ice) ice->blorp.lookup_shader = iris_blorp_lookup_shader; ice->blorp.upload_shader = iris_blorp_upload_shader; ice->blorp.exec = iris_blorp_exec; + ice->blorp.enable_tbimr = screen->driconf.enable_tbimr; } static void diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index 96621660631..5d8c3b49da6 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -874,6 +874,8 @@ iris_screen_create(int fd, const struct pipe_screen_config *config) driQueryOptionf(config->options, "lower_depth_range_rate"); screen->driconf.intel_enable_wa_14018912822 = driQueryOptionb(config->options, "intel_enable_wa_14018912822"); + screen->driconf.enable_tbimr = + driQueryOptionb(config->options, "intel_tbimr"); screen->precompile = debug_get_bool_option("shader_precompile", true); diff --git a/src/gallium/drivers/iris/iris_screen.h b/src/gallium/drivers/iris/iris_screen.h index 1a2e122ea5c..cbb52e0fbb6 100644 --- a/src/gallium/drivers/iris/iris_screen.h +++ b/src/gallium/drivers/iris/iris_screen.h @@ -189,6 +189,7 @@ struct iris_screen { bool limit_trig_input_range; float lower_depth_range_rate; bool intel_enable_wa_14018912822; + bool enable_tbimr; } driconf; /** Does the kernel support various features (KERNEL_HAS_* bitfield)? */ diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index a1e2705f3f8..aae86d23173 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -66,6 +66,8 @@ struct blorp_context { const struct brw_compiler *compiler; + bool enable_tbimr; + bool (*lookup_shader)(struct blorp_batch *batch, const void *key, uint32_t key_size, uint32_t *kernel_out, void *prog_data_out); diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 796eb8c484d..e0498c698ff 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -99,6 +99,7 @@ anv_device_init_blorp(struct anv_device *device) device->blorp.compiler = device->physical->compiler; device->blorp.lookup_shader = lookup_blorp_shader; device->blorp.upload_shader = upload_blorp_shader; + device->blorp.enable_tbimr = device->physical->instance->enable_tbimr; device->blorp.exec = anv_genX(device->info, blorp_exec); } diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 055f9a79fbb..b7596d3a46e 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -88,6 +88,7 @@ static const driOptionDescription anv_dri_options[] = { DRI_CONF_ANV_QUERY_COPY_WITH_SHADER_THRESHOLD(6) DRI_CONF_ANV_FORCE_INDIRECT_DESCRIPTORS(false) DRI_CONF_SHADER_SPILLING_RATE(0) + DRI_CONF_OPT_B(intel_tbimr, false, "Enable TBIMR tiled rendering") DRI_CONF_SECTION_END DRI_CONF_SECTION_DEBUG @@ -1609,6 +1610,7 @@ anv_init_dri_options(struct anv_instance *instance) driQueryOptioni(&instance->dri_options, "force_vk_vendor"); instance->has_fake_sparse = driQueryOptionb(&instance->dri_options, "fake_sparse"); + instance->enable_tbimr = driQueryOptionb(&instance->dri_options, "intel_tbimr"); } VkResult anv_CreateInstance( diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index af03235a90a..478e122b99b 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1018,6 +1018,8 @@ struct anv_instance { struct driOptionCache available_dri_options; int mesh_conv_prim_attrs_to_vert_attrs; + bool enable_tbimr; + /** * Workarounds for game bugs. */
