Module: Mesa
Branch: main
Commit: 9bd47aabaf332ba08713c311c1fec4086e1639ae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bd47aabaf332ba08713c311c1fec4086e1639ae
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date: Wed Oct 11 12:57:44 2023 -0700
anv: Add more space for init_render_queue_state() batch (MTL regression)
It may be some MTL specific code paths, but 7cdacaf4935 is triggering
anvil to run out of space when initializing the render batch.
Fixes: 7cdacaf4935 ("intel/xehp: Adjust TBIMR performance chicken bits.")
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25949>
---
src/intel/vulkan/genX_init_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_init_state.c
b/src/intel/vulkan/genX_init_state.c
index 96254cece89..1b0dbfe889f 100644
--- a/src/intel/vulkan/genX_init_state.c
+++ b/src/intel/vulkan/genX_init_state.c
@@ -330,7 +330,7 @@ init_render_queue_state(struct anv_queue *queue, bool
is_companion_rcs_batch)
{
struct anv_device *device = queue->device;
UNUSED const struct intel_device_info *devinfo = queue->device->info;
- uint32_t cmds[128];
+ uint32_t cmds[256];
struct anv_batch batch = {
.start = cmds,
.next = cmds,
