Mesa (main): iris: handle tile case where cso width, height is zero

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: faed5d647f2416bb0ce3a9d33a3955169c70dc52
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=faed5d647f2416bb0ce3a9d33a3955169c70dc52

Author: Tapani Pälli <tapani.pa...@intel.com>
Date:   Wed Nov  1 11:15:54 2023 +0200

iris: handle tile case where cso width, height is zero

Patch adds a fallback to calculate_tile_dimensions if such case is hit,
this happened when running CTS tests on simulation.

Fixes: d13c81a2c3bf ("iris/xehp: Implement TBIMR tile pass setup and pipeline 
bandwidth estimation.")
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Reviewed-by: Francisco Jerez <curroje...@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25989>

---

 src/gallium/drivers/iris/iris_state.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_state.c 
b/src/gallium/drivers/iris/iris_state.c
index 206cb4f63c5..3cbeea7e42f 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -6369,6 +6369,9 @@ calculate_tile_dimensions(struct iris_context *ice,
 
    struct pipe_framebuffer_state *cso = &ice->state.framebuffer;
 
+   if (cso->width == 0 || cso->height == 0)
+      return false;
+
    for (unsigned i = 0; i < cso->nr_cbufs; i++) {
       const struct iris_surface *surf = (void *)cso->cbufs[i];