Module: Mesa Branch: main Commit: e71a9e14f7217410d7654a45fb4575a62553b7ae URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e71a9e14f7217410d7654a45fb4575a62553b7ae
Author: Sagar Ghuge <sagar.gh...@intel.com> Date: Fri Nov 3 11:15:38 2023 -0700 iris: Disable auxiliary buffer if MSRT is bound as texture This change introduce the full resolve of MCS data by copying compressed surface to uncompressed surface and also disables the auxiliary buffer if MSRT is bound as texture on ACM platform. Signed-off-by: Sagar Ghuge <sagar.gh...@intel.com> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26043> --- src/gallium/drivers/iris/iris_resolve.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c index 14a6d95d583..4a202bc7e88 100644 --- a/src/gallium/drivers/iris/iris_resolve.c +++ b/src/gallium/drivers/iris/iris_resolve.c @@ -250,6 +250,14 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice, struct iris_resource *res = (void *) surf->base.texture; + /* Undocumented workaround: + * + * Disable auxiliary buffer if MSRT is bound as texture. + */ + if (intel_device_info_is_dg2(devinfo) && res->surf.samples > 1 && + nir->info.outputs_read != 0) + draw_aux_buffer_disabled[i] = true; + enum isl_aux_usage aux_usage = iris_resource_render_aux_usage(ice, res, surf->view.format, surf->view.base_level, @@ -583,6 +591,19 @@ iris_mcs_exec(struct iris_context *ice, if (op == ISL_AUX_OP_PARTIAL_RESOLVE) { blorp_mcs_partial_resolve(&blorp_batch, &surf, res->surf.format, start_layer, num_layers); + } else if (op == ISL_AUX_OP_FULL_RESOLVE) { + /* Simply copy compressed surface to uncompressed surface in order to do + * the full resolve. + */ + struct blorp_surf src_surf, dst_surf; + iris_blorp_surf_for_resource(&batch->screen->isl_dev, &src_surf, + &res->base.b, res->aux.usage, 0, false); + iris_blorp_surf_for_resource(&batch->screen->isl_dev, &dst_surf, + &res->base.b, ISL_AUX_USAGE_NONE, 0, true); + + blorp_copy(&blorp_batch, &src_surf, 0, 0, &dst_surf, 0, 0, + 0, 0, 0, 0, surf.surf->logical_level0_px.width, + surf.surf->logical_level0_px.height); } else { assert(op == ISL_AUX_OP_AMBIGUATE); blorp_mcs_ambiguate(&blorp_batch, &surf, start_layer, num_layers);