Module: Mesa Branch: main Commit: ae0df368a80d526b71ff135380995cb0399b7714 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae0df368a80d526b71ff135380995cb0399b7714
Author: José Roberto de Souza <jose.so...@intel.com> Date: Wed Aug 9 09:57:58 2023 -0700 intel/common: Add intel_gem_read_correlate_cpu_gpu_timestamp() This function will make use of Xe DRM_XE_DEVICE_QUERY_ENGINE_CYCLES by returning correlate CPU ang GPU timestamp to be used by Intel drives. This correlate timestamps gives us more accuracy. Signed-off-by: José Roberto de Souza <jose.so...@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24591> --- src/intel/common/intel_gem.c | 26 +++++++++++++++++++++ src/intel/common/intel_gem.h | 10 +++++++++ src/intel/common/xe/intel_gem.c | 50 +++++++++++++++++++++++++++++++++++++++-- src/intel/common/xe/intel_gem.h | 11 +++++++++ 4 files changed, 95 insertions(+), 2 deletions(-) diff --git a/src/intel/common/intel_gem.c b/src/intel/common/intel_gem.c index 0bf1b296466..ee010056e26 100644 --- a/src/intel/common/intel_gem.c +++ b/src/intel/common/intel_gem.c @@ -116,6 +116,32 @@ intel_gem_read_render_timestamp(int fd, } } +bool +intel_gem_read_correlate_cpu_gpu_timestamp(int fd, + enum intel_kmd_type kmd_type, + enum intel_engine_class engine_class, + uint16_t engine_instance, + clockid_t cpu_clock_id, + uint64_t *cpu_timestamp, + uint64_t *gpu_timestamp, + uint64_t *cpu_delta) +{ + switch (kmd_type) { + case INTEL_KMD_TYPE_I915: + return false; + case INTEL_KMD_TYPE_XE: + return xe_gem_read_correlate_cpu_gpu_timestamp(fd, engine_class, + engine_instance, + cpu_clock_id, + cpu_timestamp, + gpu_timestamp, + cpu_delta); + default: + unreachable("Missing"); + return false; + } +} + bool intel_gem_create_context_ext(int fd, enum intel_gem_create_context_flags flags, uint32_t *ctx_id) diff --git a/src/intel/common/intel_gem.h b/src/intel/common/intel_gem.h index 8c25aa9d0e2..c2d76fcae96 100644 --- a/src/intel/common/intel_gem.h +++ b/src/intel/common/intel_gem.h @@ -29,6 +29,7 @@ extern "C" { #endif #include <assert.h> +#include <time.h> #include <errno.h> #include <stdbool.h> #include <stdint.h> @@ -88,6 +89,15 @@ bool intel_gem_supports_syncobj_wait(int fd); bool intel_gem_read_render_timestamp(int fd, enum intel_kmd_type kmd_type, uint64_t *value); +bool +intel_gem_read_correlate_cpu_gpu_timestamp(int fd, + enum intel_kmd_type kmd_type, + enum intel_engine_class engine_class, + uint16_t engine_instance, + clockid_t cpu_clock_id, + uint64_t *cpu_timestamp, + uint64_t *gpu_timestamp, + uint64_t *cpu_delta); bool intel_gem_can_render_on_fd(int fd, enum intel_kmd_type kmd_type); /* Functions only used by i915 */ diff --git a/src/intel/common/xe/intel_gem.c b/src/intel/common/xe/intel_gem.c index cca0db5e956..f5aff725379 100644 --- a/src/intel/common/xe/intel_gem.c +++ b/src/intel/common/xe/intel_gem.c @@ -22,10 +22,11 @@ */ #include "xe/intel_gem.h" -#include "common/intel_gem.h" - #include "drm-uapi/xe_drm.h" +#include "common/intel_gem.h" +#include "common/xe/intel_engine.h" + bool xe_gem_read_render_timestamp(int fd, uint64_t *value) { @@ -41,3 +42,48 @@ xe_gem_can_render_on_fd(int fd) }; return intel_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query) == 0; } + +bool +xe_gem_read_correlate_cpu_gpu_timestamp(int fd, + enum intel_engine_class engine_class, + uint16_t engine_instance, + clockid_t cpu_clock_id, + uint64_t *cpu_timestamp, + uint64_t *gpu_timestamp, + uint64_t *cpu_delta) +{ + struct drm_xe_query_engine_cycles engine_cycles = {}; + struct drm_xe_device_query query = { + .query = DRM_XE_DEVICE_QUERY_ENGINE_CYCLES, + .size = sizeof(engine_cycles), + .data = (uintptr_t)&engine_cycles, + }; + + switch (cpu_clock_id) { + case CLOCK_MONOTONIC: +#ifdef CLOCK_MONOTONIC_RAW + case CLOCK_MONOTONIC_RAW: +#endif + case CLOCK_REALTIME: + case CLOCK_BOOTTIME: + case CLOCK_TAI: + break; + default: + return false; + } + + engine_cycles.eci.engine_class = intel_engine_class_to_xe(engine_class); + engine_cycles.eci.engine_instance = engine_instance; + engine_cycles.eci.gt_id = 0; + engine_cycles.clockid = cpu_clock_id; + + if (intel_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) + return false; + + *cpu_timestamp = engine_cycles.cpu_timestamp; + *gpu_timestamp = engine_cycles.engine_cycles; + if (cpu_delta) + *cpu_delta = engine_cycles.cpu_delta; + + return true; +} diff --git a/src/intel/common/xe/intel_gem.h b/src/intel/common/xe/intel_gem.h index 364b1bcc99f..6be526afb3a 100644 --- a/src/intel/common/xe/intel_gem.h +++ b/src/intel/common/xe/intel_gem.h @@ -25,6 +25,17 @@ #include <stdbool.h> #include <stdint.h> +#include <time.h> + +#include "common/intel_engine.h" bool xe_gem_read_render_timestamp(int fd, uint64_t *value); +bool +xe_gem_read_correlate_cpu_gpu_timestamp(int fd, + enum intel_engine_class engine_class, + uint16_t engine_instance, + clockid_t cpu_clock_id, + uint64_t *cpu_timestamp, + uint64_t *gpu_timestamp, + uint64_t *cpu_delta); bool xe_gem_can_render_on_fd(int fd);
