Module: Mesa
Branch: main
Commit: 3d3176aa1776d7784e3ed63136472d05314b488e
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d3176aa1776d7784e3ed63136472d05314b488e

Author: Danylo Piliaiev <dpilia...@igalia.com>
Date:   Thu Nov  9 10:58:43 2023 +0100

tu/a7xx: Fix occlusion queries on pre-A740 GPUs

CP_EVENT_WRITE7::WRITE_SAMPLE_COUNT is supported only starting from
a740, previous GPUs use RB_SAMPLE_COUNT_ADDR.

See: https://github.com/yuzu-emu/yuzu/issues/11958

Signed-off-by: Danylo Piliaiev <dpilia...@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26124>

---

 src/freedreno/common/freedreno_dev_info.h |  3 +++
 src/freedreno/common/freedreno_devices.py |  1 +
 src/freedreno/registers/adreno/a6xx.xml   |  2 +-
 src/freedreno/vulkan/tu_query.cc          | 14 ++++++++++++--
 4 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/freedreno/common/freedreno_dev_info.h 
b/src/freedreno/common/freedreno_dev_info.h
index bc7bb6c4a91..6726ca43f0a 100644
--- a/src/freedreno/common/freedreno_dev_info.h
+++ b/src/freedreno/common/freedreno_dev_info.h
@@ -198,6 +198,9 @@ struct fd_dev_info {
        * _something_, observed in blob's disassembly.
        */
       bool stsc_duplication_quirk;
+
+      /* Whether there is CP_EVENT_WRITE7::WRITE_SAMPLE_COUNT */
+      bool has_event_write_sample_count;
    } a7xx;
 };
 
diff --git a/src/freedreno/common/freedreno_devices.py 
b/src/freedreno/common/freedreno_devices.py
index da18775439e..cf6e9d0fab7 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -708,6 +708,7 @@ a7xx_730 = A7XXProps()
 
 a7xx_740 = A7XXProps(
         stsc_duplication_quirk = True,
+        has_event_write_sample_count = True,
     )
 
 add_gpus([
diff --git a/src/freedreno/registers/adreno/a6xx.xml 
b/src/freedreno/registers/adreno/a6xx.xml
index e167e4f0679..e50454b72ed 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -2573,7 +2573,7 @@ to upconvert to 32b float internally?
                </reg32>
        </array>
        <!-- 0x891b-0x8926 invalid -->
-       <reg64 offset="0x8927" name="RB_SAMPLE_COUNT_ADDR" type="waddress" 
align="16" variants="A6XX" usage="cmd"/>
+       <reg64 offset="0x8927" name="RB_SAMPLE_COUNT_ADDR" type="waddress" 
align="16" usage="cmd"/>
        <!-- 0x8929-0x89ff invalid -->
 
        <!-- TODO: there are some registers in the 0x8a00-0x8bff range -->
diff --git a/src/freedreno/vulkan/tu_query.cc b/src/freedreno/vulkan/tu_query.cc
index e940c8aa2e3..2e33e77f5d7 100644
--- a/src/freedreno/vulkan/tu_query.cc
+++ b/src/freedreno/vulkan/tu_query.cc
@@ -847,11 +847,16 @@ emit_begin_occlusion_query(struct tu_cmd_buffer *cmdbuf,
    tu_cs_emit_regs(cs,
                    A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true));
 
-   if (CHIP == A6XX) {
+   if 
(!cmdbuf->device->physical_device->info->a7xx.has_event_write_sample_count) {
       tu_cs_emit_regs(cs,
                         A6XX_RB_SAMPLE_COUNT_ADDR(.qword = begin_iova));
       tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
       tu_cs_emit(cs, ZPASS_DONE);
+      if (CHIP == A7XX) {
+         /* Copied from blob's cmdstream, not sure why it is done. */
+         tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
+         tu_cs_emit(cs, CCU_CLEAN_DEPTH);
+      }
    } else {
       tu_cs_emit_pkt7(cs, CP_EVENT_WRITE7, 3);
       tu_cs_emit(cs, CP_EVENT_WRITE7_0(.event = ZPASS_DONE,
@@ -1154,11 +1159,16 @@ emit_end_occlusion_query(struct tu_cmd_buffer *cmdbuf,
    tu_cs_emit_regs(cs,
                    A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true));
 
-   if (CHIP == A6XX) {
+   if 
(!cmdbuf->device->physical_device->info->a7xx.has_event_write_sample_count) {
       tu_cs_emit_regs(cs,
                         A6XX_RB_SAMPLE_COUNT_ADDR(.qword = end_iova));
       tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
       tu_cs_emit(cs, ZPASS_DONE);
+      if (CHIP == A7XX) {
+         /* Copied from blob's cmdstream, not sure why it is done. */
+         tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
+         tu_cs_emit(cs, CCU_CLEAN_DEPTH);
+      }
    } else {
       /* A7XX TODO: Calculate (end - begin) via ZPASS_DONE. */
       tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 3);

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