Module: Mesa Branch: main Commit: d067413a725136a02caf03bdea0a7c68bbed9461 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d067413a725136a02caf03bdea0a7c68bbed9461
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Fri Oct 27 10:39:28 2023 +0200 radv: optimize emitting inlined push constants with DGC With DGC, push constants can be set from the cmdbuf (CmdPushConstants()) or from the indirect layout. Instead of always emitting inlined push constants from the DGC shader, just update the ones that come from the indirect layout and rely on cmdbuf updates for the other ones. With that, it should be possible to preprocess push constants with graphics when all can be inlined in shaders. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935> --- src/amd/vulkan/radv_device_generated_commands.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/src/amd/vulkan/radv_device_generated_commands.c b/src/amd/vulkan/radv_device_generated_commands.c index 17af95bfad0..a5b1f54a912 100644 --- a/src/amd/vulkan/radv_device_generated_commands.c +++ b/src/amd/vulkan/radv_device_generated_commands.c @@ -118,7 +118,7 @@ radv_get_sequence_size(const struct radv_indirect_command_layout *layout, struct } if (locs->shader_data[AC_UD_INLINE_PUSH_CONSTANTS].sgpr_idx >= 0) /* One PKT3_SET_SH_REG writing all inline push constants. */ - *cmd_size += (3 * locs->shader_data[AC_UD_INLINE_PUSH_CONSTANTS].num_sgprs) * 4; + *cmd_size += (3 * util_bitcount64(layout->push_constant_mask)) * 4; } if (need_copy) *upload_size += align(pipeline->push_constant_size + 16 * pipeline->dynamic_offset_count, 16); @@ -829,20 +829,13 @@ dgc_emit_push_constant(nir_builder *b, struct dgc_cmdbuf *cs, nir_def *stream_bu nir_load_ssbo(b, 1, 32, param_buf, nir_iadd(b, param_offset_offset, nir_ishl_imm(b, cur_idx, 2))); nir_def *new_data = nir_load_ssbo(b, 1, 32, stream_buf, nir_iadd(b, stream_base, stream_offset)); nir_store_var(b, data, new_data, 0x1); - } - nir_push_else(b, NULL); - { - nir_store_var( - b, data, - nir_load_ssbo(b, 1, 32, param_buf, nir_iadd(b, param_const_offset, nir_ishl_imm(b, cur_idx, 2))), - 0x1); - } - nir_pop_if(b, NULL); - nir_def *pkt[3] = {nir_pkt3(b, PKT3_SET_SH_REG, nir_imm_int(b, 1)), - nir_iadd(b, inline_sgpr, nir_load_var(b, pc_idx)), nir_load_var(b, data)}; + nir_def *pkt[3] = {nir_pkt3(b, PKT3_SET_SH_REG, nir_imm_int(b, 1)), + nir_iadd(b, inline_sgpr, nir_load_var(b, pc_idx)), nir_load_var(b, data)}; - dgc_emit(b, cs, nir_vec(b, pkt, 3)); + dgc_emit(b, cs, nir_vec(b, pkt, 3)); + } + nir_pop_if(b, NULL); nir_store_var(b, idx, nir_iadd_imm(b, cur_idx, 1), 0x1); nir_store_var(b, pc_idx, nir_iadd_imm(b, nir_load_var(b, pc_idx), 1), 0x1);
