Module: Mesa Branch: main Commit: 3a0a3a5c350e4bb354dfb4823e32b70ab9d7655e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a0a3a5c350e4bb354dfb4823e32b70ab9d7655e
Author: Marek Olšák <marek.ol...@amd.com> Date: Sat Nov 18 23:07:06 2023 -0500 radeonsi: implement gl_Layer in FS as a system value This replaces the vec4 FS input with the Ancillary VGPR input. Reviewed-by: Qiang Yu <yuq...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274> --- src/amd/ci/radeonsi-raven-fails.txt | 4 ++++ src/amd/ci/radeonsi-stoney-fails.txt | 6 ++++++ src/gallium/drivers/radeonsi/si_get.c | 1 + src/gallium/drivers/radeonsi/si_nir_lower_abi.c | 3 +++ src/gallium/drivers/radeonsi/si_shader.c | 22 ++++++++++------------ src/gallium/drivers/radeonsi/si_shader.h | 1 + src/gallium/drivers/radeonsi/si_shader_info.c | 4 +++- src/gallium/drivers/radeonsi/si_state_shaders.cpp | 3 ++- 8 files changed, 30 insertions(+), 14 deletions(-) diff --git a/src/amd/ci/radeonsi-raven-fails.txt b/src/amd/ci/radeonsi-raven-fails.txt index 25e0bd179c1..9049f6f914c 100644 --- a/src/amd/ci/radeonsi-raven-fails.txt +++ b/src/amd/ci/radeonsi-raven-fails.txt @@ -153,3 +153,7 @@ spec@!opengl 1.1@line-smooth-stipple,Fail spec@arb_viewport_array@display-list,Fail # since transition XORG -> WESTON glx@glx_arb_sync_control@waitformsc,Fail + +# remove these after updating piglit: +spec@arb_fragment_layer_viewport@layer-gs-write-simple,Fail +spec@arb_fragment_layer_viewport@layer-vs-write-simple,Fail diff --git a/src/amd/ci/radeonsi-stoney-fails.txt b/src/amd/ci/radeonsi-stoney-fails.txt index 79b4927e6de..c83cf4fb427 100644 --- a/src/amd/ci/radeonsi-stoney-fails.txt +++ b/src/amd/ci/radeonsi-stoney-fails.txt @@ -233,3 +233,9 @@ spec@!opengl 1.1@line-smooth-stipple,Fail spec@arb_viewport_array@display-list,Fail # since transition XORG -> WESTON glx@glx_arb_sync_control@waitformsc,Fail + +# remove these after updating piglit: +spec@arb_fragment_layer_viewport@layer-gs-writes-out-of-range,Fail +spec@arb_fragment_layer_viewport@layer-vs-write-simple,Fail +spec@arb_fragment_layer_viewport@layer-gs-write-simple,Fail +spec@arb_fragment_layer_viewport@layer-vs-gs-write-simple,Fail diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index e15ab779966..672c0cce298 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -1390,6 +1390,7 @@ void si_init_screen_get_functions(struct si_screen *sscreen) * when execution mode is rtz instead of rtne. */ .force_f2f16_rtz = true, + .lower_layer_fs_input_to_sysval = true, }; *sscreen->nir_options = nir_options; } diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index 6a44ce13065..fdd29fdbbc5 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -593,6 +593,9 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s replacement = nir_ilt_imm(b, prim_mask, 0); break; } + case nir_intrinsic_load_layer_id: + replacement = ac_nir_unpack_arg(b, &args->ac, args->ac.ancillary, 16, 13); + break; case nir_intrinsic_load_color0: case nir_intrinsic_load_color1: { uint32_t colors_read = sel->info.colors_read; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 8c0b9f4fbed..c97256d6620 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1640,18 +1640,11 @@ static bool si_nir_kill_outputs(nir_shader *nir, const union si_shader_key *key) nir_function_impl *impl = nir_shader_get_entrypoint(nir); assert(impl); assert(nir->info.stage <= MESA_SHADER_GEOMETRY); - uint64_t kill_outputs = key->ge.opt.kill_outputs; - /* Always remove the interpolated gl_Layer output for blit shaders on the first compile - * (it's always unused by PS), otherwise we hang because we don't pass the attribute ring - * pointer to position-only shaders that also write gl_Layer. - */ - if (nir->info.stage == MESA_SHADER_VERTEX && nir->info.vs.blit_sgprs_amd) - kill_outputs |= BITFIELD64_BIT(SI_UNIQUE_SLOT_LAYER); - - if (!kill_outputs && + if (!key->ge.opt.kill_outputs && !key->ge.opt.kill_pointsize && - !key->ge.opt.kill_clip_distances) { + !key->ge.opt.kill_clip_distances && + !(nir->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_LAYER))) { nir_metadata_preserve(impl, nir_metadata_all); return false; } @@ -1675,7 +1668,7 @@ static bool si_nir_kill_outputs(nir_shader *nir, const union si_shader_key *key) nir_io_semantics sem = nir_intrinsic_io_semantics(intr); if (nir_slot_is_varying(sem.location) && - kill_outputs & + key->ge.opt.kill_outputs & (1ull << si_shader_io_get_unique_index(sem.location))) progress |= nir_remove_varying(intr, MESA_SHADER_FRAGMENT); @@ -1705,6 +1698,11 @@ static bool si_nir_kill_outputs(nir_shader *nir, const union si_shader_key *key) progress |= nir_remove_sysval_output(intr); } break; + + case VARYING_SLOT_LAYER: + /* LAYER is never passed to FS. Instead, we load it there as a system value. */ + progress |= nir_remove_varying(intr, MESA_SHADER_FRAGMENT); + break; } } } @@ -2650,7 +2648,7 @@ si_set_spi_ps_input_config(struct si_shader *shader) S_0286CC_LINEAR_SAMPLE_ENA(info->uses_linear_sample) | S_0286CC_FRONT_FACE_ENA(info->uses_frontface) | S_0286CC_SAMPLE_COVERAGE_ENA(info->reads_samplemask) | - S_0286CC_ANCILLARY_ENA(info->uses_sampleid); + S_0286CC_ANCILLARY_ENA(info->uses_sampleid || info->uses_layer_id); uint8_t mask = info->reads_frag_coord_mask | info->reads_sample_pos_mask; u_foreach_bit(i, mask) { diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index cd59fe01bef..51c41faab85 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -504,6 +504,7 @@ struct si_shader_info { bool uses_indirect_descriptor; bool has_divergent_loop; bool uses_sampleid; + bool uses_layer_id; bool has_non_uniform_tex_access; bool uses_vmem_sampler_or_bvh; diff --git a/src/gallium/drivers/radeonsi/si_shader_info.c b/src/gallium/drivers/radeonsi/si_shader_info.c index d0585ed6c25..2b2ca3d21d9 100644 --- a/src/gallium/drivers/radeonsi/si_shader_info.c +++ b/src/gallium/drivers/radeonsi/si_shader_info.c @@ -641,6 +641,7 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir, info->uses_persp_centroid = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID); info->uses_persp_center = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL); info->uses_sampleid = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_ID); + info->uses_layer_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_LAYER_ID); if (nir->info.stage == MESA_SHADER_FRAGMENT) { info->writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH); @@ -748,7 +749,8 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir, /* Ignore outputs that are not passed from VS to PS. */ if (semantic != VARYING_SLOT_POS && semantic != VARYING_SLOT_PSIZ && - semantic != VARYING_SLOT_CLIP_VERTEX) { + semantic != VARYING_SLOT_CLIP_VERTEX && + semantic != VARYING_SLOT_LAYER) { info->outputs_written_before_ps |= 1ull << si_shader_io_get_unique_index(semantic); } diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index fb2c9ce28bb..467b478f025 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -3136,7 +3136,8 @@ static void si_init_shader_selector_async(void *job, void *gdata, int thread_ind semantic != VARYING_SLOT_POS && semantic != VARYING_SLOT_PSIZ && semantic != VARYING_SLOT_CLIP_VERTEX && - semantic != VARYING_SLOT_EDGE) { + semantic != VARYING_SLOT_EDGE && + semantic != VARYING_SLOT_LAYER) { id = si_shader_io_get_unique_index(semantic); sel->info.outputs_written_before_ps &= ~(1ull << id); }
