Module: Mesa Branch: main Commit: e0a24c7fe04a06bd620b468092d5e882c92b514d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0a24c7fe04a06bd620b468092d5e882c92b514d
Author: Marek Olšák <marek.ol...@amd.com> Date: Sun Nov 19 01:06:46 2023 -0500 ac/nir: add kill_layer flag to VS/GS/NGG lowering When the framebuffer state has only 1 layer, the output has no effect. Reviewed-by: Qiang Yu <yuq...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274> --- src/amd/common/ac_nir.c | 6 ++++++ src/amd/common/ac_nir.h | 3 +++ src/amd/common/ac_nir_lower_ngg.c | 4 ++++ src/amd/vulkan/radv_pipeline.c | 2 +- src/amd/vulkan/radv_pipeline_graphics.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 2 ++ 6 files changed, 17 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir.c b/src/amd/common/ac_nir.c index 3afc33e555b..a8e5f270453 100644 --- a/src/amd/common/ac_nir.c +++ b/src/amd/common/ac_nir.c @@ -672,6 +672,7 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, bool has_param_exports, bool disable_streamout, bool kill_pointsize, + bool kill_layer, bool force_vrs, ac_nir_gs_output_info *output_info) { @@ -760,6 +761,8 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, uint64_t export_outputs = b.shader->info.outputs_written | VARYING_BIT_POS; if (kill_pointsize) export_outputs &= ~VARYING_BIT_PSIZ; + if (kill_layer) + export_outputs &= ~VARYING_BIT_LAYER; ac_nir_export_position(&b, gfx_level, clip_cull_mask, !has_param_exports, force_vrs, true, export_outputs, outputs.data, NULL); @@ -833,6 +836,7 @@ ac_nir_lower_legacy_vs(nir_shader *nir, bool export_primitive_id, bool disable_streamout, bool kill_pointsize, + bool kill_layer, bool force_vrs) { nir_function_impl *impl = nir_shader_get_entrypoint(nir); @@ -867,6 +871,8 @@ ac_nir_lower_legacy_vs(nir_shader *nir, uint64_t export_outputs = nir->info.outputs_written | VARYING_BIT_POS; if (kill_pointsize) export_outputs &= ~VARYING_BIT_PSIZ; + if (kill_layer) + export_outputs &= ~VARYING_BIT_LAYER; ac_nir_export_position(&b, gfx_level, clip_cull_mask, !has_param_exports, force_vrs, true, export_outputs, outputs.data, NULL); diff --git a/src/amd/common/ac_nir.h b/src/amd/common/ac_nir.h index 8c7eac56031..98aaa4419a5 100644 --- a/src/amd/common/ac_nir.h +++ b/src/amd/common/ac_nir.h @@ -167,6 +167,7 @@ typedef struct { bool has_gen_prim_query; bool has_xfb_prim_query; bool kill_pointsize; + bool kill_layer; bool force_vrs; /* VS */ @@ -248,6 +249,7 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, bool has_param_exports, bool disable_streamout, bool kill_pointsize, + bool kill_layer, bool force_vrs, ac_nir_gs_output_info *output_info); @@ -260,6 +262,7 @@ ac_nir_lower_legacy_vs(nir_shader *nir, bool export_primitive_id, bool disable_streamout, bool kill_pointsize, + bool kill_layer, bool force_vrs); bool diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index e5729d89e0d..d26c5d4eb19 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -2611,6 +2611,8 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, const ac_nir_lower_ngg_options *option uint64_t export_outputs = shader->info.outputs_written | VARYING_BIT_POS; if (options->kill_pointsize) export_outputs &= ~VARYING_BIT_PSIZ; + if (options->kill_layer) + export_outputs &= ~VARYING_BIT_LAYER; const bool wait_attr_ring = must_wait_attr_ring(options->gfx_level, options->has_param_exports); if (wait_attr_ring) @@ -3122,6 +3124,8 @@ ngg_gs_export_vertices(nir_builder *b, nir_def *max_num_out_vtx, nir_def *tid_in uint64_t export_outputs = b->shader->info.outputs_written | VARYING_BIT_POS; if (s->options->kill_pointsize) export_outputs &= ~VARYING_BIT_PSIZ; + if (s->options->kill_layer) + export_outputs &= ~VARYING_BIT_LAYER; const bool wait_attr_ring = must_wait_attr_ring(s->options->gfx_level, s->options->has_param_exports); if (wait_attr_ring) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 896501fd4f1..5aaa5bedf33 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -638,7 +638,7 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_pipeline_key NIR_PASS_V(stage->nir, ac_nir_lower_legacy_vs, gfx_level, stage->info.outinfo.clip_dist_mask | stage->info.outinfo.cull_dist_mask, stage->info.outinfo.vs_output_param_offset, stage->info.outinfo.param_exports, - stage->info.outinfo.export_prim_id, false, false, stage->info.force_vrs_per_vertex); + stage->info.outinfo.export_prim_id, false, false, false, stage->info.force_vrs_per_vertex); } else { bool emulate_ngg_gs_query_pipeline_stat = device->physical_device->emulate_ngg_gs_query_pipeline_stat; diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 31df3efa6d8..772da4168a9 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -2202,7 +2202,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache nir_shader *nir = ac_nir_create_gs_copy_shader( gs_stage->nir, device->physical_device->rad_info.gfx_level, gs_info->outinfo.clip_dist_mask | gs_info->outinfo.cull_dist_mask, gs_info->outinfo.vs_output_param_offset, - gs_info->outinfo.param_exports, false, false, gs_info->force_vrs_per_vertex, &output_info); + gs_info->outinfo.param_exports, false, false, false, gs_info->force_vrs_per_vertex, &output_info); nir_validate_shader(nir, "after ac_nir_create_gs_copy_shader"); nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index c3a1d6ef51d..be070a88e4e 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2341,6 +2341,7 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader, shader->key.ge.mono.u.vs_export_prim_id, !si_shader_uses_streamout(shader), key->ge.opt.kill_pointsize, + false, sel->screen->options.vrs2x2); } } else if (is_legacy_gs) { @@ -2494,6 +2495,7 @@ si_nir_generate_gs_copy_shader(struct si_screen *sscreen, shader->info.nr_param_exports, !si_shader_uses_streamout(gs_shader), gskey->ge.opt.kill_pointsize, + false, sscreen->options.vrs2x2, output_info);
