Module: Mesa Branch: main Commit: a499be0ee32cbb2d5637e165f8b93d596aea288c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a499be0ee32cbb2d5637e165f8b93d596aea288c
Author: Rohan Garg <rohan.g...@intel.com> Date: Fri Oct 28 14:41:25 2022 +0200 intel/genxml: Update IDD for new fields Signed-off-by: Rohan Garg <rohan.g...@intel.com> Reviewed-by: Caio Oliveira <caio.olive...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390> --- src/intel/genxml/gen20.xml | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/genxml/gen20.xml b/src/intel/genxml/gen20.xml index b5c44fb6ba9..6d5bd5bbf66 100644 --- a/src/intel/genxml/gen20.xml +++ b/src/intel/genxml/gen20.xml @@ -44,6 +44,7 @@ </field> <field name="Binding Table Pointer" start="133" end="148" type="offset" /> <field name="Number of Threads in GPGPU Thread Group" start="160" end="169" type="uint" /> + <field name="Thread group forward progress guarantee" start="173" end="173" type="bool" /> <field name="Shared Local Memory Size" start="176" end="180" type="uint" /> <field name="Rounding Mode" start="182" end="183" type="uint"> <value name="RTNE" value="0" />
