Module: Mesa
Branch: main
Commit: 5560835fbe23dc3d99e84c1e8d89f6c694966878
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5560835fbe23dc3d99e84c1e8d89f6c694966878

Author: José Roberto de Souza <jose.so...@intel.com>
Date:   Fri Dec  1 09:32:18 2023 -0800

anv: Avoid unnecessary intel_flush calls

Batch bos are always allocated with ANV_BO_ALLOC_HOST_CACHED_COHERENT
so there is no need to do cflush calls.
But if we ever decide to change that anv_bo_needs_host_cache_flush()
will make sure cflush is called.

Outside of batch bos, this patch is also removing the
intel_flush_range() call from anv_QueuePresentKHR because
device->debug_frame_desc is offset of workaround_bo that is also
allocated as ANV_BO_ALLOC_HOST_COHERENT.

Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26457>

---

 src/intel/vulkan/anv_batch_chain.c      | 9 ++++++---
 src/intel/vulkan/anv_private.h          | 7 +++++++
 src/intel/vulkan/anv_utrace.c           | 3 ++-
 src/intel/vulkan/anv_wsi.c              | 6 ------
 src/intel/vulkan/i915/anv_batch_chain.c | 6 ++++--
 src/intel/vulkan/xe/anv_batch_chain.c   | 6 ++++--
 6 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index 0a8e7d46f8d..d511b9623e4 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -361,7 +361,8 @@ anv_batch_bo_link(struct anv_cmd_buffer *cmd_buffer,
    *map = intel_canonical_address(next_bbo->bo->offset + next_bbo_offset);
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (cmd_buffer->device->physical->memory.need_flush)
+   if (cmd_buffer->device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(prev_bbo->bo->alloc_flags))
       intel_flush_range(map, sizeof(uint64_t));
 #endif
 }
@@ -1673,7 +1674,8 @@ anv_queue_submit_simple_batch(struct anv_queue *queue,
 
    memcpy(batch_bo->map, batch->start, batch_size);
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (device->physical->memory.need_flush)
+   if (device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(batch_bo->alloc_flags))
       intel_flush_range(batch_bo->map, batch_size);
 #endif
 
@@ -1713,7 +1715,8 @@ anv_queue_submit_trtt_batch(struct anv_sparse_submission 
*submit,
 
    memcpy(trtt_bbo->bo->map, batch->start, trtt_bbo->size);
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (device->physical->memory.need_flush)
+   if (device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(trtt_bbo->bo->alloc_flags))
       intel_flush_range(trtt_bbo->bo->map, trtt_bbo->size);
 #endif
 
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 8e0f673a189..a3551b8b191 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -512,6 +512,13 @@ anv_bo_ref(struct anv_bo *bo)
 enum intel_device_info_mmap_mode
 anv_bo_get_mmap_mode(struct anv_device *device, struct anv_bo *bo);
 
+static inline bool
+anv_bo_needs_host_cache_flush(enum anv_bo_alloc_flags alloc_flags)
+{
+   return (alloc_flags & (ANV_BO_ALLOC_HOST_CACHED | 
ANV_BO_ALLOC_HOST_COHERENT)) ==
+          ANV_BO_ALLOC_HOST_CACHED;
+}
+
 struct anv_address {
    struct anv_bo *bo;
    int64_t offset;
diff --git a/src/intel/vulkan/anv_utrace.c b/src/intel/vulkan/anv_utrace.c
index 9a94b60ebfd..56d445958a8 100644
--- a/src/intel/vulkan/anv_utrace.c
+++ b/src/intel/vulkan/anv_utrace.c
@@ -366,7 +366,8 @@ anv_utrace_create_ts_buffer(struct u_trace_context *utctx, 
uint32_t size_b)
 
    memset(bo->map, 0, bo->size);
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (device->physical->memory.need_flush)
+   if (device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(bo->alloc_flags))
       intel_flush_range(bo->map, bo->size);
 #endif
 
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index 04b87bf60da..ab8e5d5fc6c 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -113,12 +113,6 @@ VkResult anv_QueuePresentKHR(
 
    if (device->debug_frame_desc) {
       device->debug_frame_desc->frame_id++;
-#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-      if (device->physical->memory.need_flush) {
-         intel_flush_range(device->debug_frame_desc,
-                           sizeof(*device->debug_frame_desc));
-      }
-#endif
    }
 
    if (u_trace_should_process(&device->ds.trace_context))
diff --git a/src/intel/vulkan/i915/anv_batch_chain.c 
b/src/intel/vulkan/i915/anv_batch_chain.c
index 640c1d7cbf4..3cfff100e20 100644
--- a/src/intel/vulkan/i915/anv_batch_chain.c
+++ b/src/intel/vulkan/i915/anv_batch_chain.c
@@ -481,7 +481,8 @@ setup_execbuf_for_cmd_buffers(struct anv_execbuf *execbuf,
    }
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (device->physical->memory.need_flush)
+   if (device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(device->batch_bo_pool.bo_alloc_flags))
       anv_cmd_buffer_clflush(cmd_buffers, num_cmd_buffers);
 #endif
 
@@ -561,7 +562,8 @@ setup_utrace_execbuf(struct anv_execbuf *execbuf, struct 
anv_queue *queue,
          return result;
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-      if (device->physical->memory.need_flush)
+      if (device->physical->memory.need_flush &&
+          anv_bo_needs_host_cache_flush(bo->alloc_flags))
          intel_flush_range(bo->map, bo->size);
 #endif
    }
diff --git a/src/intel/vulkan/xe/anv_batch_chain.c 
b/src/intel/vulkan/xe/anv_batch_chain.c
index 0a1c4573de4..9632a8cc53d 100644
--- a/src/intel/vulkan/xe/anv_batch_chain.c
+++ b/src/intel/vulkan/xe/anv_batch_chain.c
@@ -244,7 +244,8 @@ xe_queue_exec_utrace_locked(struct anv_queue *queue,
    xe_exec_fill_sync(&xe_sync, utrace_submit->sync, 0, TYPE_SIGNAL);
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-   if (device->physical->memory.need_flush) {
+   if (device->physical->memory.need_flush &&
+       anv_bo_needs_host_cache_flush(device->utrace_bo_pool.bo_alloc_flags)) {
       util_dynarray_foreach(&utrace_submit->batch_bos, struct anv_bo *, bo)
          intel_flush_range((*bo)->map, (*bo)->size);
    }
@@ -362,7 +363,8 @@ xe_queue_exec_locked(struct anv_queue *queue,
       anv_cmd_buffer_chain_command_buffers(cmd_buffers, cmd_buffer_count);
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-      if (device->physical->memory.need_flush)
+      if (device->physical->memory.need_flush &&
+          anv_bo_needs_host_cache_flush(device->batch_bo_pool.bo_alloc_flags))
          anv_cmd_buffer_clflush(cmd_buffers, cmd_buffer_count);
 #endif
 

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