Module: Mesa Branch: main Commit: 72e30c8853f23a7fb823905fccb3884a75c29884 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72e30c8853f23a7fb823905fccb3884a75c29884
Author: Yonggang Luo <luoyongg...@gmail.com> Date: Thu Nov 2 04:44:59 2023 +0800 treewide: Avoid use align as variable, replace it with other names align is a function and when we want use it, the align variable will shadow it So replace it with other names Signed-off-by: Yonggang Luo <luoyongg...@gmail.com> Reviewed-by: Faith Ekstrand <faith.ekstr...@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25997> --- src/amd/common/ac_rgp_elf_object_pack.c | 8 ++++---- src/compiler/glsl_types.h | 4 ++-- src/freedreno/ir3/ir3_ra.c | 14 +++++++------- src/freedreno/vulkan/tu_suballoc.cc | 4 ++-- src/freedreno/vulkan/tu_suballoc.h | 2 +- src/intel/compiler/brw_eu.h | 4 ++-- src/intel/compiler/brw_eu_emit.c | 14 +++++++------- src/intel/vulkan/anv_nir_compute_push_layout.c | 4 ++-- src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c | 4 ++-- 9 files changed, 29 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_rgp_elf_object_pack.c b/src/amd/common/ac_rgp_elf_object_pack.c index 634e0d672ff..46aed499f82 100644 --- a/src/amd/common/ac_rgp_elf_object_pack.c +++ b/src/amd/common/ac_rgp_elf_object_pack.c @@ -321,10 +321,10 @@ ac_rgp_file_write_elf_text(FILE *output, uint32_t *elf_size_calc, } symbol_offset += rgp_shader_data->code_size; - uint32_t align = ALIGN(symbol_offset, 256) - symbol_offset; - fseek(output, align, SEEK_CUR); - *elf_size_calc += align; - *text_size = symbol_offset + align; + uint32_t aligned = ALIGN(symbol_offset, 256) - symbol_offset; + fseek(output, aligned, SEEK_CUR); + *elf_size_calc += aligned; + *text_size = symbol_offset + aligned; } /* diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index e41d0137b98..62986496714 100644 --- a/src/compiler/glsl_types.h +++ b/src/compiler/glsl_types.h @@ -58,7 +58,7 @@ void encode_type_to_blob(struct blob *blob, const struct glsl_type *type); const struct glsl_type *decode_type_from_blob(struct blob_reader *blob); typedef void (*glsl_type_size_align_func)(const struct glsl_type *type, - unsigned *size, unsigned *align); + unsigned *size, unsigned *alignment); enum glsl_base_type { /* Note: GLSL_TYPE_UINT, GLSL_TYPE_INT, and GLSL_TYPE_FLOAT must be 0, 1, @@ -483,7 +483,7 @@ struct glsl_type { const glsl_type *get_explicit_std430_type(bool row_major) const; const glsl_type *get_explicit_interface_type(bool supports_std430) const; const glsl_type *get_explicit_type_for_size_align(glsl_type_size_align_func type_info, - unsigned *size, unsigned *align) const; + unsigned *size, unsigned *alignment) const; const glsl_type *without_array() const; const glsl_type *row_type() const; const glsl_type *column_type() const; diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c index 6ad5b8c1902..070f67ba7ba 100644 --- a/src/freedreno/ir3/ir3_ra.c +++ b/src/freedreno/ir3/ir3_ra.c @@ -1047,7 +1047,7 @@ static physreg_t compress_regs_left(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg) { - unsigned align = reg_elem_size(reg); + unsigned reg_align = reg_elem_size(reg); DECLARE_ARRAY(struct ra_removed_interval, intervals); intervals_count = intervals_sz = 0; intervals = NULL; @@ -1061,7 +1061,7 @@ compress_regs_left(struct ra_ctx *ctx, struct ra_file *file, unsigned dst_size = reg->tied ? 0 : reg_size(reg); unsigned ec_dst_size = is_early_clobber(reg) ? reg_size(reg) : 0; unsigned half_dst_size = 0, ec_half_dst_size = 0; - if (align == 1) { + if (reg_align == 1) { half_dst_size = dst_size; ec_half_dst_size = ec_dst_size; } @@ -1069,7 +1069,7 @@ compress_regs_left(struct ra_ctx *ctx, struct ra_file *file, unsigned removed_size = 0, removed_half_size = 0; unsigned removed_killed_size = 0, removed_killed_half_size = 0; unsigned file_size = - align == 1 ? MIN2(file->size, RA_HALF_SIZE) : file->size; + reg_align == 1 ? MIN2(file->size, RA_HALF_SIZE) : file->size; physreg_t start_reg = 0; foreach_interval_rev_safe (interval, file) { @@ -1134,7 +1134,7 @@ compress_regs_left(struct ra_ctx *ctx, struct ra_file *file, */ if (candidate_start + removed_size + ec_dst_size + MAX2(removed_killed_size, dst_size) <= file->size && - (align != 1 || + (reg_align != 1 || candidate_start + removed_half_size + ec_half_dst_size + MAX2(removed_killed_half_size, half_dst_size) <= file_size)) { start_reg = candidate_start; @@ -1322,7 +1322,7 @@ update_affinity(struct ra_file *file, struct ir3_register *reg, static physreg_t find_best_gap(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *dst, unsigned file_size, unsigned size, - unsigned align) + unsigned alignment) { /* This can happen if we create a very large merge set. Just bail out in that * case. @@ -1333,7 +1333,7 @@ find_best_gap(struct ra_ctx *ctx, struct ra_file *file, BITSET_WORD *available = is_early_clobber(dst) ? file->available_to_evict : file->available; - unsigned start = ALIGN(file->start, align) % (file_size - size + align); + unsigned start = ALIGN(file->start, alignment) % (file_size - size + alignment); unsigned candidate = start; do { bool is_available = true; @@ -1354,7 +1354,7 @@ find_best_gap(struct ra_ctx *ctx, struct ra_file *file, return candidate; } - candidate += align; + candidate += alignment; if (candidate + size > file_size) candidate = 0; } while (candidate != start); diff --git a/src/freedreno/vulkan/tu_suballoc.cc b/src/freedreno/vulkan/tu_suballoc.cc index 99448f1c043..585ffe87a5f 100644 --- a/src/freedreno/vulkan/tu_suballoc.cc +++ b/src/freedreno/vulkan/tu_suballoc.cc @@ -49,11 +49,11 @@ tu_bo_suballocator_finish(struct tu_suballocator *suballoc) VkResult tu_suballoc_bo_alloc(struct tu_suballoc_bo *suballoc_bo, struct tu_suballocator *suballoc, - uint32_t size, uint32_t align) + uint32_t size, uint32_t alignment) { struct tu_bo *bo = suballoc->bo; if (bo) { - uint32_t offset = ALIGN(suballoc->next_offset, align); + uint32_t offset = ALIGN(suballoc->next_offset, alignment); if (offset + size <= bo->size) { suballoc_bo->bo = tu_bo_get_ref(bo); suballoc_bo->iova = bo->iova + offset; diff --git a/src/freedreno/vulkan/tu_suballoc.h b/src/freedreno/vulkan/tu_suballoc.h index 0cda339bc98..6ed131738ef 100644 --- a/src/freedreno/vulkan/tu_suballoc.h +++ b/src/freedreno/vulkan/tu_suballoc.h @@ -47,7 +47,7 @@ tu_bo_suballocator_finish(struct tu_suballocator *suballoc); VkResult tu_suballoc_bo_alloc(struct tu_suballoc_bo *suballoc_bo, struct tu_suballocator *suballoc, - uint32_t size, uint32_t align); + uint32_t size, uint32_t alignment); void * tu_suballoc_bo_map(struct tu_suballoc_bo *bo); diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index 69eceb80769..12118286c80 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -200,9 +200,9 @@ const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz ); bool brw_try_override_assembly(struct brw_codegen *p, int start_offset, const char *identifier); -void brw_realign(struct brw_codegen *p, unsigned align); +void brw_realign(struct brw_codegen *p, unsigned alignment); int brw_append_data(struct brw_codegen *p, void *data, - unsigned size, unsigned align); + unsigned size, unsigned alignment); brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode); void brw_add_reloc(struct brw_codegen *p, uint32_t id, enum brw_shader_reloc_type type, diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 9f54ef52c05..93f1f930d1b 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -643,11 +643,11 @@ brw_inst_set_state(const struct brw_isa_info *isa, } static brw_inst * -brw_append_insns(struct brw_codegen *p, unsigned nr_insn, unsigned align) +brw_append_insns(struct brw_codegen *p, unsigned nr_insn, unsigned alignment) { assert(util_is_power_of_two_or_zero(sizeof(brw_inst))); - assert(util_is_power_of_two_or_zero(align)); - const unsigned align_insn = MAX2(align / sizeof(brw_inst), 1); + assert(util_is_power_of_two_or_zero(alignment)); + const unsigned align_insn = MAX2(alignment / sizeof(brw_inst), 1); const unsigned start_insn = ALIGN(p->nr_insn, align_insn); const unsigned new_nr_insn = start_insn + nr_insn; @@ -672,17 +672,17 @@ brw_append_insns(struct brw_codegen *p, unsigned nr_insn, unsigned align) } void -brw_realign(struct brw_codegen *p, unsigned align) +brw_realign(struct brw_codegen *p, unsigned alignment) { - brw_append_insns(p, 0, align); + brw_append_insns(p, 0, alignment); } int brw_append_data(struct brw_codegen *p, void *data, - unsigned size, unsigned align) + unsigned size, unsigned alignment) { unsigned nr_insn = DIV_ROUND_UP(size, sizeof(brw_inst)); - void *dst = brw_append_insns(p, nr_insn, align); + void *dst = brw_append_insns(p, nr_insn, alignment); memcpy(dst, data, size); /* If it's not a whole number of instructions, memset the end */ diff --git a/src/intel/vulkan/anv_nir_compute_push_layout.c b/src/intel/vulkan/anv_nir_compute_push_layout.c index 4035ba2f9cf..b25e3c36c46 100644 --- a/src/intel/vulkan/anv_nir_compute_push_layout.c +++ b/src/intel/vulkan/anv_nir_compute_push_layout.c @@ -133,8 +133,8 @@ anv_nir_compute_push_layout(nir_shader *nir, /* For vec4 our push data size needs to be aligned to a vec4 and for * scalar, it needs to be aligned to a DWORD. */ - const unsigned align = compiler->scalar_stage[nir->info.stage] ? 4 : 16; - nir->num_uniforms = ALIGN(push_end - push_start, align); + const unsigned alignment = compiler->scalar_stage[nir->info.stage] ? 4 : 16; + nir->num_uniforms = ALIGN(push_end - push_start, alignment); prog_data->nr_params = nir->num_uniforms / 4; prog_data->param = rzalloc_array(mem_ctx, uint32_t, prog_data->nr_params); diff --git a/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c b/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c index b85b4926c61..d6a7834f2df 100644 --- a/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c +++ b/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c @@ -112,8 +112,8 @@ anv_nir_compute_push_layout(nir_shader *nir, /* For vec4 our push data size needs to be aligned to a vec4 and for * scalar, it needs to be aligned to a DWORD. */ - const unsigned align = compiler->scalar_stage[nir->info.stage] ? 4 : 16; - nir->num_uniforms = ALIGN(push_end - push_start, align); + const unsigned alignment = compiler->scalar_stage[nir->info.stage] ? 4 : 16; + nir->num_uniforms = ALIGN(push_end - push_start, alignment); prog_data->nr_params = nir->num_uniforms / 4; prog_data->param = rzalloc_array(mem_ctx, uint32_t, prog_data->nr_params);
