Module: Mesa Branch: main Commit: 7be8bc2c971bd40101f1ac537d7cf518ed648179 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7be8bc2c971bd40101f1ac537d7cf518ed648179
Author: Jordan Justen <jordan.l.jus...@intel.com> Date: Thu Feb 23 01:09:31 2023 -0800 isl: Add mocs for xe2 Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com> Reviewed-by: José Roberto de Souza <jose.so...@intel.com> Reviewed-by: Rohan Garg <rohan.g...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26593> --- src/intel/isl/isl.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 5035eeaeb82..158092b6ecf 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -109,7 +109,20 @@ isl_device_setup_mocs(struct isl_device *dev) { dev->mocs.protected_mask = 0; - if (dev->info->ver >= 12) { + if (dev->info->ver >= 20) { + /* L3+L4=WB; BSpec: 71582 */ + dev->mocs.internal = 1 << 1; + dev->mocs.external = 1 << 1; + dev->mocs.protected_mask = 3 << 0; + /* TODO: Setting to uncached + * WA 14018443005: + * Ensure that any compression-enabled resource from gfx memory subject + * to app recycling (e.g. OGL sparse resource backing memory or + * Vulkan heaps) is never PAT/MOCS'ed as L3:UC. + */ + dev->mocs.blitter_dst = 1 << 1; + dev->mocs.blitter_src = 1 << 1; + } else if (dev->info->ver >= 12) { if (intel_device_info_is_mtl(dev->info)) { /* Cached L3+L4; BSpec: 45101 */ dev->mocs.internal = 1 << 1;
