Module: Mesa Branch: main Commit: 06056310947a4c9bf9c969a82ad23839dca5f327 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=06056310947a4c9bf9c969a82ad23839dca5f327
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Thu Dec 7 19:18:15 2023 +0100 radv: stop clearing FMASK_COMPRESS_1FRAG_ONLY for TC-compat CMASK images TC-compat CMASK means Fmask decompression isn't needed because the hw can read it directly from shaders, so this shouldn't have any effects. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26575> --- src/amd/vulkan/meta/radv_meta.h | 16 ---------------- src/amd/vulkan/radv_cmd_buffer.c | 7 ------- src/amd/vulkan/radv_device.c | 6 +----- 3 files changed, 1 insertion(+), 28 deletions(-) diff --git a/src/amd/vulkan/meta/radv_meta.h b/src/amd/vulkan/meta/radv_meta.h index 0774c4272db..cf4f6be03cf 100644 --- a/src/amd/vulkan/meta/radv_meta.h +++ b/src/amd/vulkan/meta/radv_meta.h @@ -226,22 +226,6 @@ void radv_meta_decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image void radv_meta_decode_astc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, VkImageLayout layout, const VkImageSubresourceLayers *subresource, VkOffset3D offset, VkExtent3D extent); -/** - * Return whether the bound pipeline is the DCC decompress pass. - */ -static inline bool -radv_is_dcc_decompress_pipeline(struct radv_cmd_buffer *cmd_buffer) -{ - struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline; - - if (!pipeline) - return false; - - return pipeline->custom_blend_mode == V_028808_CB_DCC_DECOMPRESS_GFX8 || - (cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX11 && - pipeline->custom_blend_mode == V_028808_CB_DCC_DECOMPRESS_GFX11); -} - /* common nir builder helpers */ #include "nir/nir_builder.h" diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index ac278dab129..adb10667497 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2766,13 +2766,6 @@ radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer, int index, struct r cb_color_info &= C_028C70_COMPRESSION; } - if (radv_image_is_tc_compat_cmask(image) && radv_is_dcc_decompress_pipeline(cmd_buffer)) { - /* If this bit is set, the FMASK decompression operation - * doesn't occur (DCC_COMPRESS also implies FMASK_DECOMPRESS). - */ - cb_color_info &= C_028C70_FMASK_COMPRESS_1FRAG_ONLY; - } - if (cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX11) { radeon_set_context_reg_seq(cmd_buffer->cs, R_028C6C_CB_COLOR0_VIEW + index * 0x3c, 4); radeon_emit(cmd_buffer->cs, cb->cb_color_view); /* CB_COLOR0_VIEW */ diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 5b5451401e8..60e00ff45e9 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1744,11 +1744,7 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff } if (radv_image_is_tc_compat_cmask(iview->image)) { - /* Allow the texture block to read FMASK directly - * without decompressing it. This bit must be cleared - * when performing FMASK_DECOMPRESS or DCC_COMPRESS, - * otherwise the operation doesn't happen. - */ + /* Allow the texture block to read FMASK directly without decompressing it. */ cb->cb_color_info |= S_028C70_FMASK_COMPRESS_1FRAG_ONLY(1); if (device->physical_device->rad_info.gfx_level == GFX8) {
