URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0594915e631877bcdf8ce67636143a017b41fb1
Author: Michel Dänzer <mdaen...@redhat.com>
Date:   Thu Dec 14 11:43:44 2023 +0100

    glx: Handle IGNORE_GLX_SWAP_METHOD_OML regardless of GLX_USE_APPLEGL
    
    Avoids tons of
    
     WARNING: unknown fbconfig attribute from server: tag 0x8060 value 0x8063
    
    messages with LIBGL_DEBUG=verbose.
    
    Fixes: e64ab3e4a94c ("glx: Delete support for GLX_OML_swap_method.")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26685>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9548f969bda1075b20dd56a73cbf1e35c0cf7aba
Author: Michel Dänzer <mdaen...@redhat.com>
Date:   Thu Dec 14 11:32:53 2023 +0100

    gallium/dri: Return __DRI_ATTRIB_SWAP_UNDEFINED for _SWAP_METHOD
    
    In contrast to __DRI_ATTRIB_SWAP_EXCHANGE, this is compatible with Mesa
    < 23.3 on the client side.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10080
    Fixes: e64ab3e4a94c ("glx: Delete support for GLX_OML_swap_method.")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26685>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=290d958c63002e725f96770783497a57e16d8cc6
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 23:05:20 2023 -0600

    nak/nir: Set nir_lower_io_lower_64bit_to_32 for varyings
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9fb7b0280c90b81d7b3c0aaf89953b21e957e44
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 23:36:38 2023 -0600

    nak: Implement b2f64
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26d649f1200100f8f80936ab634c1cc76a15d7dc
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 23:28:06 2023 -0600

    nak: Fix nir_op_f2f64
    
    We were only allocating one register
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ced1d3648379e74a182a448729779e1348c182c
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 22:53:54 2023 -0600

    nak: Wire up 64-bit nir_op_fadd/ffma/fmul and comparisons
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=995eea8d04f3f3680c643eee54b4278a6be21552
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Wed Dec 13 09:06:17 2023 -0600

    nak: Split fmul/ffma handling from fmulz/ffmaz
    
    They're enough of a special case that things are going to get confusing
    when we start adding bit sizes to fmul/ffma.  Let's make them a special
    case so they can assert all their things.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1236c5d4f1b6ba6c8d2b86270b0e7122853a498c
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 22:26:11 2023 -0600

    nak: Add the rest of the double-precision ops
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f899f44eb0c41a082d967505349799d0e01f071
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Fri Dec 8 10:49:41 2023 -0600

    nak: Rework encoding of ALU instructions on SM70+
    
    The main change here is that we match on src2 first and then src1.  This
    lets make some of the src2 code common because src2 never moves around
    if it's a register.  This change also has another subtle effect: None
    sources now work everywhere.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c53f562d1a7bb05469832b4598fc0b5f0a4271af
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 22:25:59 2023 -0600

    nak: OpDAdd doesn't have saturate
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ada338bfcce797a34b265f817d4abe40ae029a90
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Mon Dec 11 17:38:40 2023 -0600

    nak/sm70: Allow src2 of 3src ops to be an immediate
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b2232906ecfda2f78649b95d226e27bb6de0f9b
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Mon Dec 11 08:49:40 2023 -0600

    nak: Pass SrcTypes around instead of RegFile in legalize
    
    We need to be able to tell the difference between `F64` and other GPR
    source types.  In order for this to work, we also have to tighten up
    some of the requirements round GPR and SSA sources.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d24eb539c570da449ab6067eb3f44b290af2fb59
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Mon Dec 11 14:35:18 2023 -0600

    nak: Make OpAtom::cmpr a GPR source
    
    We set it to Zero for atomics other than CmpExch.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b6e6e985ee5d21d1344f19c65c7c23623efe52d
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Mon Dec 11 13:28:30 2023 -0600

    nak: Copy propagate and constant fold OpPrmt
    
    This comes up fairly frequently in int64 and fp64 use-cases.  In
    particular, we see a lot of `prmt rZ 0x4444 rZ` which is just zero.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ad5b544d80d3bf5efe27b884eebcaa92f052e69
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Thu Dec 7 22:25:19 2023 -0600

    nak: Fix copy-prop for fp64
    
    For propagating OpDAdd, we need to check for negative zero because
    negative zero is the no-op, not add with zero.  We were also propagating
    the upper and lower halves of fp64 sources wrong.  While we're here, use
    `let ... else` instead of an `if let` pattern a couple places.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d41b0a2bf592116febe576bfcda40970b22394da
Author: Faith Ekstrand <faith.ekstr...@collabora.com>
Date:   Mon Dec 11 13:10:29 2023 -0600

    nak: Move the copy detection part of opt_copy_prop to a helper
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b2e48f43203beb84ed100e92975124aa91516af
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Thu Dec 14 16:37:59 2023 +0100

    freedreno/afuc: Fix gen autodetection for a7xx
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae9604c29efea02043fd8a174d146ec35ab01ccf
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Thu Dec 14 16:26:14 2023 +0100

    freedreno/afuc: README updates for a7xx
    
    Mention the introduction of LPAC/BR/BV, and explain the shared control
    reg space.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ca347e72750a1a524f2c9b5e095014650bf3fb3
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Tue Dec 12 16:35:00 2023 +0100

    freedreno: Update more control/pipe registers for a7xx
    
    Copy over control registers that are mostly the same from a6xx and add a
    definition of the EVENT_CMD pipe register, which is updated for a7xx
    events.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d01be5534091ee1e95d310087d5fcc6e5949dcb1
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Tue Dec 12 16:13:07 2023 +0100

    freedreno/afuc: Decode (sdsN) modifier
    
    This removes the last unknown flag from read/write instructions.
    
    Because we now handle the write in CP_SET_DRAW_STATE more correctly when
    emulating, we also have to update the control register definitions and
    draw state emulation code to adjust.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55985b7301a19c6d7c027206390b39de5822ccdf
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Tue Dec 12 13:13:06 2023 +0100

    freedreno/afuc: Add syntax for pre-increment addressing
    
    This is inspired by the ARM syntax.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=579227e02829ed635648d2528d93a2d107b3bbbd
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Thu Dec 14 17:14:44 2023 +0100

    freedreno/afuc: Use SQE registers for call stack
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da3cf26564b3133d7c33d631cb04ad64c04aa0f7
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Tue Dec 12 02:19:20 2023 +0100

    freedreno/afuc: Add separate "SQE registers"
    
    It seems like starting with a6xx, the SQE has a special register space
    for reading/writing the state of the processor itself, mainly used for
    saving/restoring its state in preemption. Add support for disassembling
    it, removing one of the unknown flags bits.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c919f04066d3f2971e9cd4de0da88bfa6038865
Author: Connor Abbott <cwabbo...@gmail.com>
Date:   Mon Dec 11 20:04:32 2023 +0100

    freedreno/afuc: Handle store instruction on a5xx
    
    Turns out a5xx already had store, although not load. It was using the
    high bit of the unknown flags for this.
    
    Note that a6xx does use the high bit, and we fall back to not decoding
    it at all here before properly decoding it in the next commit. Splitting
    up the commits seems worth this small breakage.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26691>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cef345129f816a046fd07d29300aec3d92544e56
Author: Dudemanguy <random...@airmail.cc>
Date:   Sat Nov 4 23:56:14 2023 -0500

    vulkan/wsi/wayland: fix wl_event_queue memory leak
    
    When creating the swapchain, this queue is created, but it was never
    freed in wsi_wl_swapchain_free along with the rest of the resources.
    
    Signed-off-by: Dudemanguy <random...@airmail.cc>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26052>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30faa7a483eddcf1aa7aa7fc06e270a979c6affa
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Fri Aug 12 10:06:07 2022 -0700

    anv, iris, intel/genxml: Update 3DSTATE_HS for xe2
    
    Update 3DSTATE_HS programming for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ba99888587e46e362c728232d832e7170e01111
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Fri Aug 12 09:56:12 2022 -0700

    anv, iris, intel/genxml: Update 3DSTATE_GS for xe2
    
    Update 3DSTATE_GS programming for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bc7c966f47ae6f618e368fad1f9f04a652459d9
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Thu Aug 4 12:04:43 2022 -0700

    intel/batch_decoder: Update 3DSTATE_PS decoding for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a659b1f0c0f83f22020043d3c2910aa0d77f8922
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Thu Aug 4 23:44:14 2022 -0700

    anv, blorp, iris, intel/genxml: Update 3DSTATE_PS_EXTRA for xe2
    
    Update 3DSTATE_PS_EXTRA programming for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5548e6a478483a58a9081aab84720a27a2b22e9d
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Wed Aug 3 11:18:10 2022 -0700

    anv, blorp, iris, intel/genxml: Update 3DSTATE_VS for xe2
    
    Update 3DSTATE_VS programming for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f170995e6698059c2361b57e8f55c5fe538fe7c2
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Tue Aug 2 17:30:16 2022 -0700

    anv, blorp, iris: Update 3DSTATE_PS programming for xe2
    
    Rework:
     * Jordan: Move code into intel_update_ps_state()
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=80d9294d2df2f4d98936dd31b6045ae6fd9540d5
Author: Zhang, Jianxun <jianxun.zh...@intel.com>
Date:   Wed Jul 6 22:35:32 2022 -0700

    intel/isl: update 3DSTATE_STENCIL_BUFFER (xe2)
    
    Update xml file and adjust driver code to compile.
    
    Signed-off-by: Zhang, Jianxun <jianxun.zh...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a49a598ce95f1f7a4b3b611c56b1a6265e593ec
Author: Zhang, Jianxun <jianxun.zh...@intel.com>
Date:   Tue Jul 5 23:02:01 2022 -0700

    intel/genxml: update 3DSTATE_DEPTH_BUFFER instruction (xe2)
    
    Signed-off-by: Zhang, Jianxun <jianxun.zh...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=99eadc2ecb7fe60e0ccc9e8add58052d01089dcf
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date:   Tue Aug 9 14:00:57 2022 -0700

    intel/genxml: Add UNIFIED_COMPRESSION_FORMAT enum for xe2
    
    Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c418118085174522a02c319e16d2e382675889e
Author: Zhang, Jianxun <jianxun.zh...@intel.com>
Date:   Tue Jul 5 23:20:47 2022 -0700

    intel/genxml: update 3DSTATE_WM_HZ_OP instruction (xe2)
    
    The depth clear value is provided from 3DSTATE_WM_HZ_OP now.
    
    Signed-off-by: Zhang, Jianxun <jianxun.zh...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d4a9952947aa2a5f701097487fde3f0e5d08d46
Author: Zhang, Jianxun <jianxun.zh...@intel.com>
Date:   Tue Jul 5 10:17:39 2022 -0700

    intel/genxml: Remove 3DSTATE_CLEAR_PARAMS instruction (xe2)
    
    Signed-off-by: Zhang, Jianxun <jianxun.zh...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9512f61cd8a0efdc95acde71d4cd1eb3552aac1b
Author: Rohan Garg <rohan.g...@intel.com>
Date:   Wed Jul 6 14:02:00 2022 +0200

    iris,isl: Adjust driver for several commands of clear color (xe2)
    
    The xe2 xml will be updated in following commits. Commit message
    has been updated by Jianxun.
    
    Signed-off-by: Rohan Garg <rohan.g...@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>

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