Module: Mesa Branch: main Commit: 70382f7f06561dcd94e4d2e6f2bedc8dbeec5d8e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70382f7f06561dcd94e4d2e6f2bedc8dbeec5d8e
Author: José Roberto de Souza <jose.so...@intel.com> Date: Tue Dec 19 10:44:32 2023 -0800 intel/isl/xe2: Enable route of Sampler LD message to LSC Xe2 allows route of LD messages from Sampler to LSC to improve performance when some restrictions are met. BSpec: 57023 Signed-off-by: José Roberto de Souza <jose.so...@intel.com> Reviewed-by: Sagar Ghuge <sagar.gh...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26801> --- src/intel/isl/isl.h | 2 ++ src/intel/isl/isl_format.c | 39 +++++++++++++++++++++++++++++++++++++++ src/intel/isl/isl_surface_state.c | 10 ++++++++++ 3 files changed, 51 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index fc449abb6b3..0870aa590e5 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -2148,6 +2148,8 @@ enum isl_format isl_format_rgb_to_rgba(enum isl_format rgb) ATTRIBUTE_CONST; enum isl_format isl_format_rgb_to_rgbx(enum isl_format rgb) ATTRIBUTE_CONST; enum isl_format isl_format_rgbx_to_rgba(enum isl_format rgb) ATTRIBUTE_CONST; +bool isl_format_support_sampler_route_to_lsc(enum isl_format fmt); + union isl_color_value isl_color_value_swizzle(union isl_color_value src, struct isl_swizzle swizzle, diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c index 1e9bd996dc4..167671ab97a 100644 --- a/src/intel/isl/isl_format.c +++ b/src/intel/isl/isl_format.c @@ -1208,6 +1208,45 @@ isl_format_rgbx_to_rgba(enum isl_format rgbx) } } +/* + * Xe2 allows route of LD messages from Sampler to LSC to improve performance + * when some restrictions are met, here checking the format restrictions. + * + * RENDER_SURFACE_STATE::Enable Sampler Route to LSC: + * "The Surface Format is one of the following: + * + * R8_UNORM, R8G8_UNORM, R16_UNORM, R16G16_UNORM, R16G16B16A16_UNORM + * R16_FLOAT, R16G16_FLOAT, R16G16B16A16_FLOAT + * R32_FLOAT, R32G32_FLOAT, R32G32B32A32_FLOAT, R32_UINT, R32G32_UINT, R32G32B32A32_UINT + * R10G10B10A2_UNORM, R11G11B10_FLOAT + * " + */ +bool +isl_format_support_sampler_route_to_lsc(enum isl_format fmt) +{ + switch (fmt) { + case ISL_FORMAT_R8_UNORM: + case ISL_FORMAT_R8G8_UNORM: + case ISL_FORMAT_R16_UNORM: + case ISL_FORMAT_R16G16_UNORM: + case ISL_FORMAT_R16G16B16A16_UNORM: + case ISL_FORMAT_R16_FLOAT: + case ISL_FORMAT_R16G16_FLOAT: + case ISL_FORMAT_R16G16B16A16_FLOAT: + case ISL_FORMAT_R32_FLOAT: + case ISL_FORMAT_R32G32_FLOAT: + case ISL_FORMAT_R32G32B32A32_FLOAT: + case ISL_FORMAT_R32_UINT: + case ISL_FORMAT_R32G32_UINT: + case ISL_FORMAT_R32G32B32A32_UINT: + case ISL_FORMAT_R10G10B10A2_UNORM: + case ISL_FORMAT_R11G11B10_FLOAT: + return true; + default: + return false; + } +} + static inline void pack_channel(const union isl_color_value *value, unsigned i, const struct isl_channel_layout *layout, diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index eb3eafdba00..406b5bcb590 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -521,6 +521,12 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, #if GFX_VER >= 7 s.ResourceMinLOD = info->view->min_lod_clamp; + +#if GFX_VERx10 >= 200 + s.EnableSamplerRoutetoLSC = isl_format_support_sampler_route_to_lsc(info->view->format); + s.EnableSamplerRoutetoLSC &= (s.SurfaceType == SURFTYPE_2D); +#endif /* if GFX_VERx10 >= 200 */ + #else assert(info->view->min_lod_clamp == 0); #endif @@ -965,6 +971,10 @@ isl_genX(buffer_fill_state_s)(const struct isl_device *dev, void *state, s.RenderCacheReadWriteMode = 0; #endif +#if GFX_VERx10 >= 200 + s.EnableSamplerRoutetoLSC = isl_format_support_sampler_route_to_lsc(info->format); +#endif /* if GFX_VERx10 >= 200 */ + s.SurfaceBaseAddress = info->address; #if GFX_VER >= 6 s.MOCS = info->mocs;