Module: Mesa Branch: staging/23.3 Commit: 1acb1a232f14517fba553a50d667b4b8c26d15bf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1acb1a232f14517fba553a50d667b4b8c26d15bf
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue Dec 12 14:55:29 2023 +0100 radv: fix binding partial depth/stencil views with dynamic rendering With dynamic rendering, it's allowed to begin rendering with depth or stencil only but still with a depth/stencil format. The test below checks that unbound part of ds isn't modified, if depth is bound and stencil not and vice versa. This fixes a recent CTS dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25350> (cherry picked from commit 1ef5feac5ef48515bba2fa22c8a2a4e517739519) --- src/amd/ci/radv-navi10-aco-fails.txt | 1 - src/amd/ci/radv-polaris10-aco-fails.txt | 1 - src/amd/ci/radv-renoir-aco-fails.txt | 1 - src/amd/vulkan/radv_cmd_buffer.c | 12 +++++++++++- src/amd/vulkan/radv_device.c | 6 ++++-- src/amd/vulkan/radv_private.h | 2 +- 6 files changed, 16 insertions(+), 7 deletions(-) diff --git a/src/amd/ci/radv-navi10-aco-fails.txt b/src/amd/ci/radv-navi10-aco-fails.txt index 2967a976f05..acda34d6cf2 100644 --- a/src/amd/ci/radv-navi10-aco-fails.txt +++ b/src/amd/ci/radv-navi10-aco-fails.txt @@ -1,3 +1,2 @@ # New CTS failures in 1.3.7.0 dEQP-VK.api.version_check.unavailable_entry_points,Fail -dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail diff --git a/src/amd/ci/radv-polaris10-aco-fails.txt b/src/amd/ci/radv-polaris10-aco-fails.txt index 9ed35ee6c8d..c07d22fe8fc 100644 --- a/src/amd/ci/radv-polaris10-aco-fails.txt +++ b/src/amd/ci/radv-polaris10-aco-fails.txt @@ -20,4 +20,3 @@ dEQP-VK.texture.mipmap.cubemap.image_view_min_lod.base_level.nearest_nearest,Fai # New CTS failures in 1.3.7.0. dEQP-VK.api.version_check.unavailable_entry_points,Fail -dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail diff --git a/src/amd/ci/radv-renoir-aco-fails.txt b/src/amd/ci/radv-renoir-aco-fails.txt index e37b1a769a6..a91278246ec 100644 --- a/src/amd/ci/radv-renoir-aco-fails.txt +++ b/src/amd/ci/radv-renoir-aco-fails.txt @@ -1,3 +1,2 @@ # New CTS failures in 1.3.7.0. dEQP-VK.api.version_check.unavailable_entry_points,Fail -dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index cdede679552..b0800c1b979 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -7751,7 +7751,17 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe assert(d_iview == NULL || s_iview == NULL || d_iview == s_iview); ds_att.iview = d_iview ? d_iview : s_iview, ds_att.format = ds_att.iview->vk.format; - radv_initialise_ds_surface(cmd_buffer->device, &ds_att.ds, ds_att.iview); + + VkImageAspectFlags ds_aspects; + if (d_iview && s_iview) { + ds_aspects = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; + } else if (d_iview) { + ds_aspects = VK_IMAGE_ASPECT_DEPTH_BIT; + } else { + ds_aspects = VK_IMAGE_ASPECT_STENCIL_BIT; + } + + radv_initialise_ds_surface(cmd_buffer->device, &ds_att.ds, ds_att.iview, ds_aspects); assert(d_res_iview == NULL || s_res_iview == NULL || d_res_iview == s_res_iview); ds_att.resolve_iview = d_res_iview ? d_res_iview : s_res_iview; diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 1bf900d073c..247192d8a38 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1842,7 +1842,7 @@ radv_initialise_vrs_surface(struct radv_image *image, struct radv_buffer *htile_ void radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buffer_info *ds, - struct radv_image_view *iview) + struct radv_image_view *iview, VkImageAspectFlags ds_aspects) { unsigned level = iview->vk.base_mip_level; unsigned format, stencil_format; @@ -1859,7 +1859,9 @@ radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buff stencil_format = surf->has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID; uint32_t max_slice = radv_surface_max_layer_count(iview) - 1; - ds->db_depth_view = S_028008_SLICE_START(iview->vk.base_array_layer) | S_028008_SLICE_MAX(max_slice); + ds->db_depth_view = S_028008_SLICE_START(iview->vk.base_array_layer) | S_028008_SLICE_MAX(max_slice) | + S_028008_Z_READ_ONLY(!(ds_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) | + S_028008_STENCIL_READ_ONLY(!(ds_aspects & VK_IMAGE_ASPECT_STENCIL_BIT)); if (device->physical_device->rad_info.gfx_level >= GFX10) { ds->db_depth_view |= S_028008_SLICE_START_HI(iview->vk.base_array_layer >> 11) | S_028008_SLICE_MAX_HI(max_slice >> 11); diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 1d2e3f90769..7c1246812d3 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1527,7 +1527,7 @@ struct radv_ds_buffer_info { void radv_initialise_color_surface(struct radv_device *device, struct radv_color_buffer_info *cb, struct radv_image_view *iview); void radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buffer_info *ds, - struct radv_image_view *iview); + struct radv_image_view *iview, VkImageAspectFlags ds_aspects); void radv_initialise_vrs_surface(struct radv_image *image, struct radv_buffer *htile_buffer, struct radv_ds_buffer_info *ds);
