Mesa (main): intel/compiler: reemit boolean resolve for inverted if on gen5

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 56a72e014fcda3c52cf119115cb71fce2fad86d8
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=56a72e014fcda3c52cf119115cb71fce2fad86d8

Author: Dave Airlie <airl...@redhat.com>
Date:   Thu Dec 21 10:39:08 2023 +1000

intel/compiler: reemit boolean resolve for inverted if on gen5

Gen5 adds some boolean conversion instructions after nir emits,
but that nir srcs don't line up with them, so reemit the boolean
conversion if we reemit the inot.

Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Fixes: 31b5f5a51f3a ("nir/opt_if: Simplify if's with general conditions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>

---

 src/intel/compiler/brw_fs_nir.cpp | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp 
b/src/intel/compiler/brw_fs_nir.cpp
index 33f2a4046b2..ccdd0fe7db8 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -422,6 +422,17 @@ fs_nir_emit_if(nir_to_brw_state &ntb, nir_if *if_stmt)
       invert = true;
       cond_reg = get_nir_src(ntb, cond->src[0].src);
       cond_reg = offset(cond_reg, bld, cond->src[0].swizzle[0]);
+
+      if (devinfo->ver <= 5 &&
+         (cond->instr.pass_flags & BRW_NIR_BOOLEAN_MASK) == 
BRW_NIR_BOOLEAN_NEEDS_RESOLVE) {
+         /* redo boolean resolve on gen5 */
+         fs_reg masked = ntb.s.vgrf(glsl_int_type());
+         bld.AND(masked, cond_reg, brw_imm_d(1));
+         masked.negate = true;
+         fs_reg tmp = bld.vgrf(cond_reg.type);
+         bld.MOV(retype(tmp, BRW_REGISTER_TYPE_D), masked);
+         cond_reg = tmp;
+      }
    } else {
       invert = false;
       cond_reg = get_nir_src(ntb, if_stmt->condition);